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EMRA41D2H-9.5094M TR

Description
CMOS, MEMS Clock Oscillators LVCMOS (CMOS) 1.8Vdc 4 Pad 2.0mm x 2.5mm Plastic Surface Mount (SMD) MEMS Clock Oscillators LVCMOS (CMOS) 1.8Vdc 4 Pad 2.0mm x 2.5mm Plastic Surface Mount (SMD)
CategoryPassive components    oscillator   
File Size801KB,6 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance  
Download Datasheet Parametric View All

EMRA41D2H-9.5094M TR Overview

CMOS, MEMS Clock Oscillators LVCMOS (CMOS) 1.8Vdc 4 Pad 2.0mm x 2.5mm Plastic Surface Mount (SMD) MEMS Clock Oscillators LVCMOS (CMOS) 1.8Vdc 4 Pad 2.0mm x 2.5mm Plastic Surface Mount (SMD)

EMRA41D2H-9.5094M TR Parametric

Parameter NameAttribute value
Brand NameEcliptek
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSMD 2.0mm x 2.5mm
Contacts4
Manufacturer packaging codeSMD 2.0mm x 2.5mm
Reach Compliance Code163
Base Number Matches1
EMRA41D2H-9.5094M
REGULATORY COMPLIANCE
2011/65 +
2015/863
(Data Sheet downloaded on Sep 1, 2020)
191 SVHC
ITEM DESCRIPTION
MEMS Clock Oscillators LVCMOS (CMOS) 1.8Vdc 4 Pad 2.0mm x 2.5mm Plastic Surface Mount (SMD) 9.5094MHz ±20ppm over
0°C to +70°C
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
Aging at 25°C
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Output Control Function
Output Control Input Voltage Logic
High (Vih)
Output Control Input Voltage Logic
Low (Vil)
Tri-State Output Enable Time
Tri-State Output Disable Time
Period Jitter (RMS)
RMS Phase Jitter (Fj = 900kHz to
7.5MHz; Random)
RMS Phase Jitter (Fj = 12kHz to
20MHz; Random)
Start Up Time
Storage Temperature Range
9.5094MHz
±20ppm Maximum over 0°C to +70°C (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability
over the Operating Temperature Range, Supply Voltage Change, and Output Load Change)
±1.5ppm Maximum First Year
1.8Vdc ±10%
4.5mA Maximum (No Load)
90% of Vdd Minimum (IOH = -2mA)
10% of Vdd Maximum (IOL = +2mA)
1.5nSec Typical, 3.5nSec Maximum (Measured from 20% to 80% of waveform)
50 ±5(%) (Measured at 50% of waveform)
15pF Maximum
CMOS
Tri-State (Disabled Output: High Impedance)
70% of Vdd Minimum or No Connect to Enable Output
30% of Vdd Maximum to Disable Output
150nSec Maximum
150nSec Maximum
2pSec Typical, 5pSec Maximum
0.5pSec Typical, 1pSec Maximum
1.5pSec Typical, 3pSec Maximum
5mSec Maximum
-65°C to +150°C
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Flammability
Mechanical Shock
Moisture Sensitivity
Solderability
Temperature Cycling
Vibration
JESD22-A114, HBM, 2000V
UL94-V0
MIL-STD-883, Method 2002, Condition E, 10,000G
J-STD-020, MSL 1
MIL-STD-883, Method 2003 (Four I/O Pads on bottom of package only)
JESD22-A104, Condition B
MIL-STD-883, Method 2007, Condition A, 20G
www.ecliptek.com | Specification Subject to Change Without Notice | Revision D 11/15/2016 | Page 1 of 6
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
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