FULL-BRIDGE
PWM MOTOR DRIVERS
UDN2953B
The UDN2953B and UDN2954W are designed for bidirectional
control of dc or stepper motors with continuous output currents to 2 A
and peak start-up currents as high as 3.5 A. For pulse-width modulated
(chopped-mode) o
user’s selection of
OFF pulse duration is set by an external RC
operation is characterized by maximum effic
dissipation levels. Extensive intern
shutdown with hysteresis, transien
current protection.
NC
V,&RAKE
K
OUTS
A
GROUND
GROUND
SENSE
RC (TIMING)
GROUND
GROUND
turned ON. When
PHASE
OUTPUT
(ACTIVE
OUT,
V
B B
ENABLE
LOW
)
ink
while fitting a standard inte-
Dwg. No. A-l 3,024
. abs. .The lead configuration
_ _ -. .
Waring board layout. The UDN2954W,
ipation requirements, is supplied in a
package. In any package style, the
I and needs no insulation.
,
i
’
’
rnal Flyback Diodes
Thermal Shutdown
$.>%
” H Crossover Current Protection
w BRAKE, ENABLE, and Current-Limit Functions
Minimum Clamp Diode Yolt&$e,
V,
. . . . . . . .~?.,; . . . . . . . . . . . . . . Ground
Logic Supply V.&&ge, Vcc . . . . . . . . . . 7.0
V
Logic Input Voltage,
V
PHASE’
V ENABLE
. . . . . . . . . . . . . . .
V
BB
Sense Voltage, VsENSE . . . . . . . . . . . .
1.5 V
Reference Voltage, V,,,/BRAKE . . . . .
15 V
Package Power Dissipation,
P,
. . . . . . . . . . . . . . . . . . . See Graphs
Operating Temperature Range,
T, . . . . . . . . . . . . . . . . . -20°C
to +85”C
Storage Temperature Range,
T, . . . . . . . . . . . . . . . .
-55°C
to +15O”C
Always order by complete part number:
Eff,’
FUNCTIONAL BLOCK DIAGRAM
(ACTIVE LCYvVJ
= 29538 (DIP)
= 2954w (SIP)
25
50
75
100
125
150
TEMPERATURE IN “C
Dwg. GP-01 OB
UDN2954W
Dwg. No. A-l 3,028
UDN2954W
GROUND
OUT,
K
-
rv
w
x
D
EEE
25
50
75
100
125
150
%0
V,,,/BRAKE
RC(TIMING)
Vcc
0
0
TEMPERATURE IN “C
Dwg. GP-012A
TRUTH TABLE
output
Enable Phase V&BRAKE Out,
Low
Low
High
X
X = Irrelevant
High
Low
X
X
>
>
>
<
2.4
2.4
2.4
0.8
V
V
V
V
PHASE
OUTPUT ENABLE
Out,
OUT,
High
Low
Low
High
Open Open
High
High
4
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 016150036 (508) 853-5000
Copyright 0 1986, 1993 Allegro Microsystems, inc.
ELECTRICAL CHARACTERISTICS at T, = +25”C, TJ I
+15O"C,
VBB =
50
V
SENSE
= 0 V, RC = 20 k&J/470 pF to Ground.
Characteristic
Output Drivers (OUT, or OUT,)
1 Output Supply Range
Output Leakage Current
I
V
BB
I
CEX
V
CE(sus)
V
CE(SAT)
I
I
V, V,, =
5
V,
Symbol
Test Conditions
Min.
Limits
Max. 1 Units
TYP-
6.5
-
-
-
-
-
50
50
I
V
PA
I
V
ENABLE
= 5
V, VouT = V,,, (note)
V
ENABLE
= 5 v, VOUT
= 0 V, (note)
-50
-
1.2
1.4
1.8
PA
V
V
V
V
Output Sustaining Voltage
Output Saturation Voltage
I
OUT = k2
A, L = 2 mH
50
-
-
-
I
I
-
-
-
-
-
-
1.0
1.2
1.5
-
1.8
V
ENABLE
= 0 V, IouT = +0.5 A
V
ENABLE
= 0 V, IouT = +l .O A
V
ENABLE
=OV, louT=&2.0A
1 Clamp Diode Leakage Current 1
1 Clamp Diode Forward Voltage 1
Motor Supply Current
I,
V,
I
BB(ON)
I
BB(OFF)
1 V,= 50 V
1 I, = 2 A
V
ENABLE
= 0.8 V, V,,, = 2.4 V, No Load
V
ENABLE
= V,,, = 2.4 V, No Load
V
ENABLE
= 5 V, V,,, = 0.8 V, No Load
50
2.2
I
I
PA
V
mA
mA
mA
I
20
2.5
40
30
3.5
60
Control Logic
I
Logic Supply Range
Logic Input Current
I
V cc
I
IN(l)
I
IN(O)
I
All Inputs = 2.4 V
All Inputs = 0.8 V
All Inputs
All Inputs
I
REF
I
= 0
I
4.5
-
-
5.0
<-I .o
5.5
-10
I
V
PA
I
-50
-
-
-200
-
0.8
-
10.5
-
.
u
PA
V
V
V
Logic Input Voltage
V
V
IN(l)
IN(O)
2.4
-
-
V nEF Open-Circuit Voltage
V
REF(OPEN)
I
I
t
o n
t
off
T.J
I cc
v,,/2
10
1.0
l
I
Current Limit Threshold
VREF/VSENSE at Trip Point
All Drivers
All Drivers
I
I
9.5
-
I
I
-
PS
I
I
1 Turn-On Delay
Turn-Off Delay
Thermal Shutdown Temp.
Logic Supply Current
I
-
V
ENABLE
= V,,, = 2.4 V
V
ENABLE
= 0.8
V, V,,, = 2.4 V
I -
22
30
I
mA
I
NOTE: Tests performed at OUT, with VPHASE = 0.8 V and at OUT, with VPHASE = 2.4 V
APPLICATIONS INFORMATION
The UDN2953B and UDN2954W full-bridge motion control ICs are
designed for pulse-width-modulated (PWM ) bidirectional interface to
many types of dc (brush) servo, brushless dc, and 2-phase stepper
motors. These power ICs permit various techniques of direct motor
interface and offer internally and externally programmed current control.
Pulse-width-modulated output current can be regulated by an (external)
PWM control signal or use of an external sensing resistor (Rs~,,rs~) in
combination with an RC network and/or voltage reference.
The output current trip point or sense resistor formulas are:
ITRIP
=
VREF
10 RSENSE
RSENSE
=
VREF
10 ITRIP
TYPICAL
APPLICATION
UDN2953B
+36
PHASE
ENABLE
(ACTIVE LOW)
Dwg. No. A-12,649B
The allowable reference voltage range is from 2.4 V to 15 V. If
unconnected, the reference input (VREF) defaults to Vcc/2 (refer to
Figure 1) and ITRIP = 0.5 A (per typical application where Rs = 0.5 a).
When the motor current attains the specified design value, the
internal comparator triggers the monostable (‘one-shot’) multivibrator,
which disables (switches OFF) the sink (lower) output. The actual load
current may vary slightly, and the difference is (chiefly) related to the
circuit propagation delays between comparator (trip point) command
and power output switching. Applications involving very-low inductance
windings may necessitate specific consideration; typical circuit delays
(td) are about 2 ,us.
After the sink (‘low-side’) output is switched OFF, motor current
’
starts to decay, and the circulation path is through the ON source
(upper) drive output and the flyback diode protecting the sink (lower)
output. The output OFF interval is set by an external RC timing network
connected to the monostable. The magnitude of the current decay is
directly related to the OFF period and the duration should allow the
current level to drop below the trip point before reactivating the sink
output. This ON-OFF PWM cycle repeats, sustaining the desired
average current to the motor winding, and continues free-running until a
new input command switches the output state. The RC network values
range from 20 kSZ to 100 kQ for resistors, and capacitor values from
200 pF to 500 pF. The parallel RC network establishes the tofr interval
and directly affects the decaying motor current.
Internal timing circuitry is an alternative to the external RC timing
network. However, with internal timing the logic supply current rises
approximately 6 mA. Connecting the RC input to the logic supply
activates internal circuitry; torf = 12 us with Vcc = +5 V and TA = +25 C,
and increases with temperature.
The sink (lower) output is repeatedly re-enabled until the motor is
reversed, braked, or stopped. Current control via pulse modulating the
lower outputs is based on the dynamic characteristics of the much
faster NPN Darlington outputs.
Another method of controlling motor current involves external
circuitry to pulse modulate the OUTPUT ENABLE pin. Switching
NOTE: Pin 3 must be
connected to an RC
network as shown, or
to V
CC
. It must NOT be
left unconnected.
(toggling) the OUTPUT ENABLE affects both
the sink (low-side) and upper (high-side)
outputs. Both lower and upper transient-
protection diodes conduct during the OFF
interval. This method of operation produces
very rapid current decay. The sink driver
parallel diodes (common anode pin) are
connected to ground; the source output
flyback diodes (common cathode pin) are
connected to the motor supply (Vss). The
RC input pin is to be terminated to ground
through 20 ka (minimum).
The motor is braked by simultaneously
activating both source driver outputs and
disabling both sink outputs. Basically, this
shorts both terminals of the motor winding to
the supply. The back EMF (electromotive
force) of the motor develops current which
functions as a dynamic brake. Typically, the
braking current approaches the values related
to a locked rotor (or stall) condition. Funda-
mentally, locked rotor (or stall) current is
dependent upon the motor winding imped-
ance and driver output ON characteristics.
Internal current control circuitry is not opera-
tional during braking. Therefore, designers
should exercise caution to ensure that the
current produced by the back EMF does not
exceed the absolute maximum ratings of the
power outputs.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Figure 1
vcc
50K
1
In bidirectional drive applications, espe-
cially dc (brush) servos, the PHASE input is
utilized for direction control. The current
generated by back EMF at reversal is compa-
rable to that of dynamic braking, and should
be limited to the absolute maximum output
current rating.
An internally generated deadtime (ap-
proximately 3 ps) precludes the high cross-
over (or ‘shoot-through’) currents associated
with momentary, overlapping conduction of
both upper and lower outputs. This very
abrupt, coincident-ON mode occurs with
change of direction (PHASE reversal) and/or
dynamic braking.
Integrated thermal shutdown protection
circuitry switches OFF all power outputs
should the junction temperature exceed
+165”C (typical). The thermal protection is
designed to avoid power IC failures stemming
from extreme, excessive junction heating.
Thermal shutdown self protection does not
afford a proper safeguard from shorted load
and/or shorted output conditions, and should
not be operated as such. The thermal self-
protection circuitry has a (typical) hysteresis
of 8°C.
The printed wiring board should utilize
a large, heavy ground plane. To optimize
power IC performance, the package should
be soldered directly into the circuit board.
The ground side of Rs should have an
individual path to the ground terminal(s) of the
device. Also, the load supply (VBB) should be
closely decoupled with an electrolytic capaci-
tor of between IO PF and 100 PF (typically
247 PF) depending on printed wiring board
layout.
45K
1
V
REF/IO
Dwg. No. A-l 3,025
Figure 2
- “ P H A S E
CROSSOVER - ’
CURRENT DELAY
td -+- bff -4
Dwg. WM-003-1
CURRENT CONTROL OPTIONS
I
1 Control Option
No PWM
PWM with Internal Timing
1
PWM with External Timing
External PWM
I
I
I
V&BRAKE
VCC or High
VCC or High
2.4Vor15V*orVcc
VCC or High
1
20 - 100
Circuit Terminal
I
RC (TIMING)
220 kQ to Ground
k c
kQ/200-500
pF
1
I
VSENSE
1 OUTPUT ENABLE 1
Low
Low
I
I
Ground
RSENSE
TENSE
RSENSEt
Low
Togglet
I
I
I
220 kQ to Ground
I
* Programmed reference, i.e., A/D converter.
t Primarily, closed-loop speed and/or current control applications. ITRIP can be peak (or default) limit for protecting motor and/or driver IC.
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