Datasheet
3.5V to 14V, 1.0A 1ch Synchronous Buck
Converter Integrated MOSFET
BD8313HFN
General Description
The BD8313HFN can produce stepped-down voltage
from a power supply composed of 4 batteries, which
can be Li2cell, Li3cell, etc., or from a 5V/12V fixed
power supply line. Output voltages include 1.2V, 1.8V,
3.3V, or 5.0V. This IC allows easy production of a
compact power supply since its high operating
frequency of 1.0MHz requires small-sized external
inductor and capacitor and the phase compensation
components are integrated in the chip. The built-in
synchronous rectification switches are capable of
withstanding 15V.
Key Specifications
Input Voltage Range:
Output Voltage Range:
Output Current:
Switching Frequency:
Pch FET ON-Resistance:
Nch FET ON-Resistance:
Standby Current:
Operating Temperature Range:
+3.5V to +14V
+1.2V to +12V
1.0A(Max)
1.0MHz(Typ)
450mΩ(Typ)
300mΩ(Typ)
0μA(Typ)
-25°C to +85°C
Package
W(Typ) x D(Typ) x H(Max)
Features
Built-In Pch/Nch Synchronous Rectification SW
Capable of Withstanding 1.2 A/15V.
Built-In Phase Compensation Device between Input
and Output of Error AMP.
Built-In Soft-Start Function.
Built-In Short-Circuit Protection with Timer
Application
For Portable Equipments like DSC/DVC Powered by 4
Dry Batteries or Li2cell and Li3cell, or General
Consumer-Equipment with 5V/12V Lines
HSON8
2.90mm x 3.00mm x 0.60mm
Typical Application Circuit
VBAT=4.5½10V
10V
VBAT=4.5V to
10
10μ
µ
F
F
GRM31CBE106KA75L
(Murata)
GND
INV
VCC
1µF
1μ
STB
PVCC
ON/OFF
10pF
GRM188B11A105KA61
(Murata)
VREG
3.3V/500mA
68k
68k
Ω
200k
200k
Ω
1
1μ
µ
F
F
GRM188B11A105KA61
(Murata)
PGND
Lx
LX
4.7 µ
H
4.7μ
H
1127AS4R7M(TOKO)
51k Ω
51k
10
10μ
µ
F
F
GRM31CB11A106KA01
(Murata)
22k
22k
Ω
Figure 1. Typical Application Circuit
○Product
structure:Silicon monolithic integrated circuit
.
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○This
product has no designed protection against radioactive rays
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BD8313HFN
Pin Configuration
(TOP VIEW)
GND
VCC
VREG
PGND
Figure 2. Pin Configuration
INV
STB
PVCC
LX
Lx
Pin Description
Pin No.
1
2
3
4
5
6
7
8
Pin Name
GND
VCC
VREG
PGND
LX
PVCC
STB
INV
Ground pin
Control circuit power supply pin
5V output pin of regulator for internal circuit
Power transistor ground pin
Switching output pin (pin for external coil)
Power transistor supply pin
ON/OFF pin
Error AMP input pin
Function
Block Diagram
Figure 3. Block Diagram
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BD8313HFN
Description of Blocks
(1)
Reference
This is the block that generates the 1V reference voltage for the ERROR AMP.
5V REG
This block produces a 5V regulated voltage supply for the internal analog circuit. BD8313HFN is equipped with this
regulator for the purpose of protecting the internal circuit from high voltages. The output of this block decreases when
VCC is less than 5V, increasing the PMOS ON resistance and decreasing the DC/DC converter’s power efficiency and
maximum output current (Please see data in Figures 15, 16, 17, and 18).
UVLO
This circuit prevents malfunction of the internal circuit when input voltage is not enough like, while the input supply is
rising or when the power supply voltage is low. The UVLO circuit monitors VCC and turns OFF all output FETs and
DC/DC converter output when VCC is lower than 2.9V. It also resets the timer latch of the built-in SCP and soft-start
circuits.
SCP
The short-circuit protection circuit of this IC has a timer latch system. When the DC/DC converter has a duty cycle of
100%, the built-in SCP circuit starts counting. The internal counter is synchronized with the frequency of OSC. The
latch circuit turns OFF the DC/DC converter’s output after about 4.0 milliseconds or when the counter has counted
about 4000 clock pulses. To reset the latch circuit, turn the STB input OFF and ON once or turn the power supply OFF
and then ON.
OSC
This circuit generates a saw tooth wave with operating frequency fixed at 1.0MHz.
ERROR AMP
The Error Amplifier monitors the output voltage of the DC/DC converter and its output serves as a PWM control signal.
The reference voltage for the ERROR AMP is 1.0V. Primary phase compensation components, 200pF and 62kΩ, are
built-in and are placed between the inverting input and the output terminals of the ERROR AMP.
PWM COMP
This block is a voltage-to-pulse width converter for controlling the output voltage corresponding to an input voltage.
The PWM COMP controls the pulse width of the driver’s output by comparing the internal SLOPE wave with the
ERROR AMP output voltage.
SOFT START
This circuit prevents inrush current during startup by making the output voltage of the DC/DC converter increase
gradually. The soft start time is synchronized with the internal oscillator. Output voltage of the DC/DC converter
reaches the set voltage after about 8000 clock pulses.
PRE DRIVER/TIMING CONTROL
This block is the CMOS inverter circuit for driving the built-in synchronous rectifier switches. The dead time of the
synchronous switches for preventing feed-through is about 25ns.
STBY_IO
The voltage at STB (pin 7) determines whether the IC is ON or OFF. The IC is ON when STB is 2.5V or higher and
OFF when STB pin is open or at 0V. STB pin is pulled down by an internal resistor which is approximately 400kΩ.
Pch/Nch FET SW
The built-in synchronous rectification switches are for switching the coil current of the DC/DC converter. The 450mΩ
Pch FET switch and the 300mΩ Nch FET switch are capable of withstanding 15V. Since the current rating of the FETs
is 1.2A, the output current, including the ripple current of the coil IC should not exceed this limit.
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
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BD8313HFN
Absolute Maximum Ratings
Parameter
Maximum Applied Power Voltage
Maximum Input Current
Power Dissipation
Operating Temperature Range
Storage Temperature Range
Junction Temperature
Symbol
V
CC
, P
VCC
I
INMAX
Pd
Topr
Tstg
Tjmax
t
Rating
15
1.2
0.63
(Note 1)
Unit
V
A
W
°C
°C
°C
-25 to +85
-55 to +150
+150
(Note 1) When used at Ta = 25°C or more installed on a 70x70x1.6 mm board, the rating is reduced by 5.04mW/°C.
(Note) These specifications are subject to change without advance notice for modifications and other reasons.
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the
absolute maximum ratings.
Recommended Operating Conditions
Parameter
Power Supply Voltage
Output Voltage
Symbol
V
CC
V
OUT
Rating
3.5 to 14
1.2 to 12
Unit
V
V
Electrical Characteristics
(Unless otherwise specified, Ta = 25°C, V
CC
= 7.4V)
Parameter
Symbol
Limit
Min
-
100
0.9
4.65
0.99
-50
4.8
-
-
-
-1
2.5
-0.3
250
-
-
-
-
Typ
2.9
200
1.0
5.0
1.00
0
8.0
-
450
300
0
-
-
400
-
-
600
30
Max
3.2
300
1.1
5.35
1.01
+50
11.1
100
600
420
+1
14
+0.3
700
1
1
900
50
Unit
Conditions
[Low Input Voltage Malfunction Prevention Circuit]
Detection Threshold Voltage
Hysteresis Range
[Oscillator]
Oscillation Frequency
[Regulator]
Output Voltage
[Error AMP]
INV Threshold Voltage
Input Bias Current
Soft-Start Time
[PWM Comparator]
LX Max Duty
[Output]
PMOS ON-Resistance
NMOS ON-Resistance
Leak Current
[STB]
STB Pin
Control Voltage
[Circuit Current]
Standby Current
VCC Pin
PVCC
Pin
(Note 2)
V
UV
ΔV
UVHY
f
OSC
V
REG
V
INV
I
INV
t
SS
D
MAX
R
ONP
R
ONN
I
LEAK
V
mV
MHz
V
V
nA
msec
%
mΩ
mΩ
µA
V
V
kΩ
µA
µA
µA
µA
VREG monitor
V
CC
= 12.0V ,
V
INV
= 6.0V
Operation
No-Operation
V
STBH
V
STBL
R
STB
I
STB1
I
STB2
I
CC1
I
CC2
STB Pin Pull-Down Resistance
Circuit Current at Operating VCC
Circuit Current at Operating PVCC
V
INV
= 1.2V
V
INV
= 1.2V
(Note 2) 100% is MAX Duty as behavior of a PWM comparator. For the condition where High side PMOS is 100% ON-state because the input voltage is less than
or equal to the output voltage, the SCP detector is activated and then the DC/DC converter operation stops.
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BD8313HFN
Typical Performance Curves
(Unless otherwise specified, Ta = 25°C, V
CC
= 7.4V)
1.02
1.02
1.01
1.01
INV Threshold [V]
1.00
INV Threshold [V]
-40 -20
0
20
40
60
80 100 120
1.00
0.99
0.99
0.98
0.98
0
5
10
Temperature [°C]
Figure 4. INV Threshold vs Temperature
V
CC
[V]
Figure 5. INV Threshold vs V
CC
5.3
5.2
8
7
6
V
REG
Voltage [V]
V
REG
[V]
5.1
5.0
4.9
4.8
4.7
-40
0
40
80
120
5
4
3
2
1
0
0
2
4
6
8
10
12
14
Temperature [ºC]
Figure 6. VREG Output vs Temperature
V
CC
[V]
Figure 7. VREG Output vs V
CC
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