DM96101N datasheet, PDF - EEWORLD Datasheet

DM96101N: Description96 SERIES, QUAD 2-INPUT NAND GATE, PDIP14, PLASTIC, DIP-14; Categorylogic logic; File Size86KB，4 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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DM96101N Overview

96 SERIES, QUAD 2-INPUT NAND GATE, PDIP14, PLASTIC, DIP-14

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknown
series	96
JESD-30 code	R-PDIP-T14
JESD-609 code	e0
length	19.18 mm
Load capacitance (CL)	45 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.016 A
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	OPEN-COLLECTOR
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	54 mA
Prop。Delay @ Nom-Sup	25 ns
propagation delay (tpd)	25 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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