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IDT71V416YS20YG3

Description
Standard SRAM, 256KX16, 20ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-44
Categorystorage    storage   
File Size487KB,9 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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IDT71V416YS20YG3 Overview

Standard SRAM, 256KX16, 20ns, CMOS, PDSO44, 0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-44

IDT71V416YS20YG3 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSOJ
package instruction0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-44
Contacts44
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time20 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J44
JESD-609 codee3
length28.575 mm
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals44
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ44,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Maximum seat height3.683 mm
Maximum standby current0.02 A
Minimum standby current3 V
Maximum slew rate0.1 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width10.16 mm
Base Number Matches1
3.3V CMOS Static RAM
for Automotive Applications
4 Meg (256K x 16-Bit)
Features
256K x 16 advanced high-speed CMOS Static RAM
JEDEC Center Power / GND pinout for reduced noise.
Equal access and cycle times
– Automotive: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
Available in 44-pin, 400 mil plastic SOJ package and a 44-
pin, 400 mil TSOP Type II package and a 48 ball grid array,
9mm x 9mm package.
IDT71V416YS
IDT71V416YL
Description
The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized
as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs and automotive applications.
The IDT71V416 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71V416 are LVTTL-compatible and operation is from a
single 3.3V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a
44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x
9mm package.
Functional Block Diagram
Output
Enable
Buffer
OE
A0 - A17
Address
Buffers
Row / Column
Decoders
8
Chip
Select
Buffer
8
Sense
Amps
and
Write
Drivers
High
Byte
Output
Buffer
High
Byte
Write
Buffer
8
I/O 15
CS
8
I/O 8
4,194,304-bit
Memory
Array
WE
Write
Enable
Buffer
16
8
Low
Byte
Output
Buffer
Low
Byte
Write
Buffer
8
I/O 7
8
8
I/O 0
BHE
Byte
Enable
Buffers
BLE
6817 drw 01
DECEMBER 2004
1
©2004 Integrated Device Technology, Inc.
DSC-6817/00
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