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IDT7202LA12L

Description
FIFO, 1KX9, 12ns, Asynchronous, CMOS, CQCC32, LCC-32
Categorystorage    storage   
File Size153KB,14 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT7202LA12L Overview

FIFO, 1KX9, 12ns, Asynchronous, CMOS, CQCC32, LCC-32

IDT7202LA12L Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFJ
package instructionQCCN, LCC32,.45X.55
Contacts32
Reach Compliance Codenot_compliant
ECCN codeEAR99
Maximum access time12 ns
Other featuresRETRANSMIT
Maximum clock frequency (fCLK)50 MHz
period time20 ns
JESD-30 codeR-CQCC-N32
JESD-609 codee0
length13.97 mm
memory density9216 bit
Memory IC TypeOTHER FIFO
memory width9
Number of functions1
Number of terminals32
word count1024 words
character code1000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1KX9
Output characteristics3-STATE
ExportableNO
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Encapsulate equivalent codeLCC32,.45X.55
Package shapeRECTANGULAR
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
Maximum seat height3.048 mm
Maximum standby current0.005 A
Maximum slew rate0.08 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width11.43 mm
Base Number Matches1
CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9, 1K x 9
Integrated Device Technology, Inc.
IDT7200L
IDT7201LA
IDT7202LA
FEATURES:
First-In/First-Out dual-port memory
256 x 9 organization (IDT7200)
512 x 9 organization (IDT7201)
1K x 9 organization (IDT7202)
Low power consumption
— Active: 770mW (max.)
—Power-down: 2.75mW (max.)
Ultra high speed—12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Pin and functionally compatible with 720X family
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
High-performance CEMOS™ technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing #5962-87531, 5962-89666,
5962-89863 and 5962-89536 are listed on this function
Industrial temperature range (-40oC to +85oC) is
available, tested to military electrical specifications
DESCRIPTION:
The IDT7200/7201/7202 are dual-port memories that load
and empty data on a first-in/first-out basis. The devices use
Full and Empty flags to prevent data overflow and underflow
and expansion logic to allow for unlimited expansion capability
in both word size and depth.
The reads and writes are internally sequential through the
use of ring pointers, with no address information required to
load and unload data. Data is toggled in and out of the devices
through the use of the Write (
W
) and Read (
R
) pins.
The devices utilizes a 9-bit wide data array to allow for
control and parity bits at the user’s option. This feature is
especially useful in data communications applications where
it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (
RT
) capability
that allows for reset of the read pointer to its initial position
when
RT
is pulsed low to allow for retransmission from the
beginning of data. A Half-Full Flag is available in the single
device mode and width expansion modes.
The IDT7200/7201/7202 are fabricated using IDT’s high-
speed CMOS technology. They are designed for those
applications requiring asynchronous and simultaneous read/
writes in multiprocessing and rate buffer applications. Military
grade product is manufactured in compliance with the latest
revision of MIL-STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
–D
8
)
W
WRITE
CONTROL
WRITE
POINTER
RAM
ARRAY
256 x 9
512 x 9
1024 x 9
READ
POINTER
R
READ
CONTROL
THREE-
STATE
BUFFERS
DATA OUTPUTS
(Q
0
–Q
8
)
RS
RESET
LOGIC
FLAG
LOGIC
EF
FF
XO
/
HF
FL
/
RT
XI
EXPANSION
LOGIC
2679 drw 01
The IDT logo is a trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996
Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
DECEMBER 1996
DSC-2679/7
5.03
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