M58LR256KB85ZC5F datasheet, PDF

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M58LR256KB85ZC5F: DescriptionFlash, 16MX16, 85ns, PBGA79, VFBGA-79; Categorystorage storage; File Size2MB，121 Pages; ManufacturerNumonyx ( Micron ); Websitehttps://www.micron.com; Environmental Compliance

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M58LR256KB85ZC5F Overview

Flash, 16MX16, 85ns, PBGA79, VFBGA-79

M58LR256KB85ZC5F Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Numonyx ( Micron )
Parts packaging code	BGA
package instruction	VFBGA, BGA79,7X13,30
Contacts	79
Reach Compliance Code	unknown
Maximum access time	85 ns
startup block	BOTTOM
command user interface	YES
Universal Flash Interface	YES
Data polling	NO
JESD-30 code	R-PBGA-B79
length	11 mm
memory density	268435456 bit
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	4,255
Number of terminals	79
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-30 °C
organize	16MX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA79,7X13,30
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
page size	4 words
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8 V
Programming voltage	1.8 V
Certification status	Not Qualified
Maximum seat height	1 mm
Department size	16K,64K
Maximum standby current	0.00005 A
Maximum slew rate	0.067 mA
Maximum supply voltage (Vsup)	2 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.75 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
switch bit	NO
type	NOR TYPE
width	9 mm
Base Number Matches	1

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M58LR128KT M58LR128KB

M58LR256KT M58LR256KB

128 or 256 Mbit (x16, multiple bank, multilevel interface, burst)

1.8 V supply flash memories

Features

Supply voltage

– V

= 1.7 V to 2.0 V for program, erase

and read

– V

DDQ

= 1.7 V to 2.0 V for I/O buffers

– V

= 9 V for fast program

Synchronous/asynchronous read

– Synchronous burst read mode:

54 MHz, 66 MHz

– Asynchronous page read mode

– Random access: 70 ns, 85 ns

Synchronous burst read suspend

Programming time

– 2.5

μs

typical word program time using

Buffer Enhanced Factory Program

command

Memory organization

– Multiple bank memory array:

8 Mbit banks for the M58LR128KT/B

16 Mbit banks for the M58LR256KT/B

– Parameter blocks (top or bottom location)

Dual operations

– Program/erase in one bank while read in

others

– No delay between read and write

operations

Block locking

– All blocks locked at power-up

– Any combination of blocks can be locked

with zero latency

– WP for block lock-down

– Absolute write protection with V

= V

FBGA

VFBGA56 (ZB) 7.7 x 9 mm

VFBGA79 (ZC) 9 x 11 mm

TFBGA88 (ZQ) 8 x 10 mm

Security

– 64 bit unique device number

– 2112 bit user programmable OTP cells

Common flash interface (CFI)

100,000 program/erase cycles per block

Electronic signature

– Manufacturer code: 20h

– Top device codes:

M58LR128KT: 88C4h

M58LR256KT: 880Dh

– Bottom device codes

M58LR128KB: 88C5h

M58LR256KB: 880Eh

The M58LR128KT/B is available in the

ECOPACK-compliant VFBGA56 package.

The M58LR256KT/B is available in the

ECOPACK-compliant VFBGA79 and

TFBGA88 packages.

October 2008

Rev 6

1/120

www.numonyx.com

Contents

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

2.14

2.15

Address inputs (A0-Amax) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data inputs/outputs (DQ0-DQ15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Chip Enable (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Output Enable (G) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Write Enable (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Write Protect (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Reset (RP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Latch Enable (L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Clock (K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Wait (WAIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

DDQ

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

program supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

SSQ

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1

3.2

3.3

3.4

3.5

3.6

Bus read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Bus write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Address Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Output disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.1

4.2

4.3

4.4

Read Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Read Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Read Electronic Signature command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

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M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

Contents

4.5

4.6

4.7

4.8

4.9

4.10

Clear Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Blank Check command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Buffer Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Buffer Enhanced Factory Program command . . . . . . . . . . . . . . . . . . . . . 29

4.10.1

4.10.2

4.10.3

Setup phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Program and verify phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Exit phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

4.11

4.12

4.13

4.14

4.15

4.16

4.17

Program/Erase Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Program/Erase Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Protection Register Program command . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Set Configuration Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Block Lock command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Block Unlock command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Block Lock-Down command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

5.1

5.2

5.3

5.4

5.5

5.6

5.7

5.8

Program/Erase Controller status bit (SR7) . . . . . . . . . . . . . . . . . . . . . . . . 39

Erase suspend status bit (SR6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Erase/blank check status bit (SR5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Program status bit (SR4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

status bit (SR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Program suspend status bit (SR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Block protection status bit (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Bank write/multiple word program status bit (SR0) . . . . . . . . . . . . . . . . . 41

Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

6.1

6.2

6.3

6.4

6.5

6.6

Read select bit (CR15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

X latency bits (CR13-CR11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Wait polarity bit (CR10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Data output configuration bit (CR9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Wait configuration bit (CR8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Burst type bit (CR7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

3/120

Contents

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

6.7

6.8

6.9

Valid Clock edge bit (CR6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Wrap burst bit (CR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Burst length bits (CR2-CR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Read modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

7.1

7.2

7.3

Asynchronous read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Synchronous burst read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

7.2.1

Synchronous burst read suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Single synchronous read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Dual operations and multiple bank architecture . . . . . . . . . . . . . . . . . 54

Block locking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

9.1

9.2

9.3

9.4

9.5

Reading block lock status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Locked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Unlocked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Lock-down state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Locking operations during erase suspend . . . . . . . . . . . . . . . . . . . . . . . . 57

Program and erase times and endurance cycles . . . . . . . . . . . . . . . . . 59

Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Appendix A Block address tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Appendix B Common Flash interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Appendix C Flowcharts and pseudocodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Appendix D Command interface state tables. . . . . . . . . . . . . . . . . . . . . . . . . . . 110

4/120

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