RED
PDSP2110
YELLOW
PDSP2111
HIGH EFFICIENCY RED
PDSP2112
GREEN
PDSP2113
HIGH EFFICIENCY GREEN
PDSP2114
0.200” 8-Character, 5x7 Dot Matrix
Parallel Input Alphanumeric Intelligent Display
™
Package Dimensions in inches (mm)
1.680 (42.67) max.
0.210
(5.34)
0.105
(2.67)
0.771
(19.58)
0.386
(9.8)
Pin 1 Indicator
Part Number
EIA Date
Code
PLCD558X
SIEMENS WW
Z
1
0.160±.020
(4.06±.50)
0.012 (0.30) typ.
Intensity Code
Color Bin
(For Yellow Only)
0.209 (5.31)
0.086
(2.19)
0.189
(4.81)
0.600
(15.24)
FEATURES
•
Eight 0.200” Dot Matrix Characters in Red, Yellow,
High Efficiency Red, Green, High Efficiency Green
•
Built-in 2 Page, 256 Character ROM. Both pages are
Mask Programmable for Custom Fonts
•
Readable from 8 Feet (2.5 meters)
•
Built-in Decoders, Multiplexers and Drivers
•
Wide Viewing Angle, X Axis
±
55
°
, Y Axis
±
65
°
•
Programmable Features:
– Individual Flashing Character
– Full Display Blinking
– Multi-Level Dimming and Blanking
– Clear Function
– Lamp Test
•
Internal or External Clock
•
End Stackable Dual-In-Line Plastic Package
0.189
(4.79)
0.018 typ.
(.46)
0.100
(2.54) typ.
Description
The PDSP2110 (Red), PDSP2111 (Yellow), PDSP2112 (High Effi-
ciency Red), PDSP2113 (Green), PDSP2114 (High Efficiency
Green), and PDSP2115 (Soft Orange) are eight digit, 5x7 dot
matrix, parallel input, alphanumeric Intelligent Displays. The 0.20
inch high digits are packaged in a rugged, high quality, optically
transparent, 0.6 inch lead spacing, 28 pin plastic DIP.
The on-board CMOS has a built-in 256 character ROM. Both
pages are mask programmable for 256 custom characters.The
first page of ROM of a standard product contains 128 characters
including ASCII, selected European and Scientific symbols. The
second page contains Katakana Japanese characters, more
European characters, Avionics, and other graphic symbols.
The PSP211X is designed for standard microprocessor interface
techniques, and is fully TTL compatible. The Clock I/O and Clock
Select pins allow the user to cascade multiple display
modules.
2–120
Maximum Rating,
DC Supply Voltage, V
CC
to GND.............. –0.5 to +7.0 Vdc
Input Voltage Levels Relative
to Ground .......................................–0.5 to V
CC
+ 0.5 Vdc
Operating Temperature ............................. –40
°
C to +85
°
C
Storage Temperature ................................ –40
°
C to +100
°
C
Maximum Solder Temperature 0.063”
below seating plane, t<5 sec) ............................... 260
°
C
Relative Humidity at 85
°
C............................................ 85%
Note
: Maximum voltage is with no LEDs illuminated
Switching Specifications
(over operating temperature range and V
CC
=4.5 V)
Symbol
Tbw
Tacc
(2)
Tas
Tces
Tah
Tceh
Description
Time Between Writes
Display Access Time
Address Setup Time
Chip Enable Setup Time
Address Hold Time
Chip Enable Hold Time
Write Active Time
Data Valid Prior to Rising Edge of
Write
Data Hold Time
Reset Active Time
Clear Cycle Time
Min.
30
130
10
0
20
0
100
50
20
300
3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µ
s
Enlarged Character Font
Dimensions in inches (mm)
0.112
(2.85)
C1 C2 C3 C4 C5
0.030 (0.76) Typ.
R1
R2
R3
0.01 (0.254)
R4
R5
R6
R7
0.026 (0.65) Typ.
0.189
(4.81)
Tw
Tds
Tdh
Trc
(1)
Tclr
(3)
1. Wait 300 ns min. after the reset function is turned off.
2. Tacc=Tas + Tw + Tah
3. The Clear Cycle Time may be shortened by writing a second
Control Word with the Clear Bit disabled, 160 ns after the first
control word that enabled the Clear Bit.
data
write control
word-clear bit
enabled
wait
wait 130 ns
data
write control
word-clear bit
enabled
Write Cycle Timing Diagram
Tacc
Tas
FL, A3-A0
Tah
see Notes
CE
see Notes
Tces
WR
see Notes
Tw
D7-D0
Tdh
Tds
Tbw
see Notes
*Notes:
1. All input voltages are
(VIL=0.8 V, VIH=2.0 V).
2. These wave forms are not
edge triggered.
3. Tbw=Tas + Tah
Tceh
PDSP2110/1/2/3/4
2–121
Optical Characteristics at 25
°
C
, V
CC
=5.0 V at Full Brightness
Red PDSP2110
Description
Symbol
Min.
Typ.
Units
Peak Luminous Intensity
(1)
Peak Wavelength
Dominant Wavelength
Yellow PDSP2111
Description
I
V
peak
λ
(peak)
λ
(d)
70
90
660
639
µ
cd/dot
nm
nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity
(1)
Peak Wavelength
Dominant Wavelength
High Efficiency Red PDSP2112
Description
I
V
peak
λ
(peak)
λ
(d)
130
210
583
585
µ
cd/dot
nm
nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity
(1)
Peak Wavelength
Dominant Wavelength
Green PDSP2113
Description
I
V
peak
λ
(peak)
λ
(d)
150
330
630
626
µ
cd/dot
nm
nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity
(1)
Peak Wavelength
Dominant Wavelength
High Efficiency Green PDSP2114
Description
I
V
peak
λ
(peak)
λ
(d)
150
260
565
570
µ
cd/dot
nm
nm
Symbol
Min.
Typ.
Units
Peak Luminous Intensity
(1)
Peak Wavelength
Dominant Wavelength
Note
I
V
peak
λ
(peak)
λ
(d)
200
510
568
574
µ
cd/dot
nm
nm
1. Peak luminous intensity is meaaured at T
A
=T
J
=25
°
C. No time is allowed for the device to warm up prior to measurement.
PDSP2110/1/2/3/4
2–122
Electrical Characteristics at 25
°
C
Limits
Parameters
Min.
Typ.
Max.
Units
Conditions
V
CC
I
CC
Blank
I
CC
8 digits
(1)
12 dots/character
I
CC
8 digits
(1)
20 dots/character
I
IP
Current
(with pull-up)
I, Input Leakage Current
(no pull-up)
V
IH
Input Voltage High
V
IL
Input Voltage Low
V
OL
V
OH
I
OH
I
OL
θ
JC
Output Voltage Low
(Clock Pin)
Output Voltage High
(Clock Pin)
Output Current High
(Clock I/O)
Output Current Low
(Clock I/O)
Thermal Resistance
Junction to Case
4.5
5.0
0.5
200
300
11
5.5
1.0
255
370
18
±
1
V
mA
mA
mA
µ
A
µ
A
V
V
V
V
mA
V
CC
=5 V, V
IN
=5 V
V
CC
=5 V, “V” displayed in
all eight digits
V
CC
=5 V, “#” displayed in
all eight digits
V
CC
=5 V, V
IN
=0 V to V
CC
,
(WR, CE, FL, RST, CLKSEL)
V
CC
=5 V,V
IN
=0 V to V
CC
,
(Clk I/O, A0-A3, D0-D7)
V
CC
=4.5 V to 5.5 V
V
CC
=4.5 V to 5.5 V
V
CC
=4.5 V to 5.5 V,
I
OL
=1.6 mA
V
CC
=4.5 V to 5.5 V,
I
OH
=40mA
V
CC
=4.5 V, V
OH
=–2.4 V
V
CC
=4.5 V, V
OL
=–0.4 V
2.0
GND
–0.3
V
CC
+0.3
0.8
0.4
2.4
–0.9
1.6
2
25
28
28
81.14
81.14
240
500
500
125
0.98
256
2
362.5
2.83
mA
°C/W
KHz
KHz
pF
ns
ns
Hz
Hz
F
EXT
External Clock
Input Frequency
(2)
F
OSC
Internal Clock
Output Frequency
(2)
Clock I/O Buss Loading
Clock Out Rise Time
Clock Out Fall Time
FM, Digit Multiplex
Frequency
Blinking Rate
V
CC
=5.0 V, CLKSEL=0
V
CC
=5.0 V, CLKSEL=1
V
CC
=4.5 V, V
OH
=2.4 V
V
CC
=4.5 V, V
OL
=0.4 V
Note: 1. Average I
CC
measured at full brightness. Peak I
CC
=2 X I
AVG
I
CC
(# displayed).
2. Internal/external frequency duty factor is 50%.
PDSP2110/1/2/3/4
2–123
Top View
28
Pins
15
Pin Definitions
Pin
1
2
0
1
2
3
Digit
1
Pins
14
4
5
6
7
Function
Definition
Used for initiallization of a display and sy-
chronization of blinking for multiple displays
Low input accesses the Flash RAM
Address input LSB
Address input
Address input MSB
Mode selector
Used to bias IC substrate, must
be connected to V
CC
. Can't be
used to supply power to display.
RST
FL
A0
A1
A2
A3
Substr. bias
3
4
5
6
7
Pin Assignments
Pin
Function
Pin
Function
8
9
10
11
12
13
14
15
No connect
1
2
3
4
5
6
7
8
9
10
11
12
13
14
RST
FL
A0
A1
A2
A3
Substr. bias
28
27
26
25
24
23
22
21
20
D7
D6
D5
D4
D3
D2
No Pin
CLKSEL
CLK I/O
Selects internal/external clock source
Ouputs master clock or inputs externa l
clock
A low will write data into the display if
CE
is low
Positive power supply input
Analog Ground for LED drivers
Digital Ground for internal logic
Enables access to the display
WR
V
CC
GND
GND
D1
D0
No Connect
CE
GND (logic)
GND (supply)
16
17
18
19
20
21
22
23
24
25
26
27
28
No Connect
CLKSEL
CLK I/O
WR
V
CC
19
18
17
16
15
CE
No Connect
D0
D1
No pin
D2
D3
D4
D5
D6
D7
Data input LSB
Data input
Data input
Data input MSB, selects ROM, page 1 or 2
Cascading the PDSP211X Displays
RD
WR
FL
RST
V
CC
RD WR
FL
RST CLK I/O CLKSEL
Up to14 More Displays
in between
RD WR
FL
RST CLK I/O CLKSEL
PDSP2110/1/2/3/4S
D0-D7 A0-A4
Data I/O
Address
PDSP2110/1/2/3/4S
D0-D7 A0-A4
CE
CE
A6
A7
A8
A9
0
Address
Decoder Address Decode Chip 1 to 14
15
PDSP2110/1/2/3/4
2–124
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