SMCP-65656GV-40SC datasheet, PDF

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SMCP-65656GV-40SC: DescriptionStandard SRAM, 32KX8, 40ns, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, DIP-28; Categorystorage storage; File Size81KB，9 Pages; ManufacturerAtmel (Microchip)

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SMCP-65656GV-40SC Overview

Standard SRAM, 32KX8, 40ns, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, DIP-28

SMCP-65656GV-40SC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Atmel (Microchip)
Parts packaging code	DIP
package instruction	DIP, DIP28,.3
Contacts	28
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Maximum access time	40 ns
I/O type	COMMON
JESD-30 code	R-CDIP-T28
JESD-609 code	e0
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	28
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	32KX8
Output characteristics	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP28,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Filter level	BS9000 Level S2
Maximum seat height	5.84 mm
Maximum standby current	0.00008 A
Minimum standby current	2 V
Maximum slew rate	0.085 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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M65656G

32 K

8 Very Low Power CMOS SRAM Rad Tolerant

Introduction

The M65656G is a very low power CMOS static RAM

organized as 32768

8 bits.

Atmel Wireless & Microcontrollers brings the solution

for applications where fast computing is as mandatory as

low consumption, such as aerospace electronics, portable

instruments or embarked systems.

Using an array of six transistors (6T) memory cells, the

M65656G combines an extremely low standby supply

current (Typical value = 0.1

µA)

with a fast access time

at 40 ns. The high stability of the 6T cell provides

excellent protection against soft errors due to noise.

Extra protection against heavy ions is given by the use of

an epitaxial layer of a P substrate.

The M65656G is processed according to the methods of

the latest revision of the MIL STD 883 (class B or S), ESA

SCC 9000 and QML.

Features

Access time

40, 55 ns

Very low power consumption

active : 50 mW (typ)

standby : 0.5

W (typ)

data retention : 0.4

W (typ)

Wide temperature range : –55 to + 125°C

300 and 600 mils width package

TTL compatible inputs and outputs

Asynchronous

Single 5 volt supply

Equal cycle and access time

Gated inputs : no pull-up/down

resistors are required

Interface

Block Diagram

Rev. F – June 5,2000

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