The
QD48T033050
dual
output
through-hole
mounted
DC-DC converter offers unprecedented performance in a quarter brick
package by providing two independently regulated high current
outputs with total power of 100 W. This is accomplished by the use of
patent pending circuit and packaging techniques to achieve ultra-high
efficiency, excellent thermal performance and a very low body profile.
In telecommunications applications the QD48 converters provide up
to 15 A @ 3.3 V and 10 A @ 5 V simultaneously – with thermal
performance far exceeding existing dual quarter bricks and
comparable to dual half-bricks. Low body profile and the preclusion of
heatsinks minimize airflow shadowing, thus enhancing cooling for
downstream devices. The use of 100% surface-mount technologies
for assembly, coupled with Power Bel Solutions advanced electric and
thermal circuitry and packaging, results in a product with extremely
high quality and reliability.
RoHS lead-free solder and lead-solder-exempted products are
available
Delivers simultaneously up to 15 A on 3.3 VDC and up to 10 A on 5.0
VDC output
Can replace two single output quarter-bricks
Minimal cross-channel interference
High efficiency: 88% @ full load, 89% @ half load
Starts-up into pre-biased output
No minimum load required
No heat sink required
Low profile: 0.28” [7.2 mm]
Low weight: 1 oz [28 g] typical
Industry-standard footprint: 1.45” x 2.30”
Industry-standard pinout
Meets Basic Insulation Requirements of EN60950
Withstands 100 V input transient for 100ms
On-board LC input filter
Fixed-frequency operation
Fully protected
Output voltage trim range: ±10% for both outputs
Trim resistor via industry-standard equations
High reliability: MTBF 2.6 million hours, calculated per Telcordia TR-
332, Method I Case 1
Positive or negative logic ON/OFF option
Approved to the latest edition and amendment of ITE Safety standards,
UL/CSA 60950-1 and IEC60950-1
Meets conducted emissions requirements of FCC
Class B and EN55022 Class B with external filter
All materials meet UL94, V-0 flammability rating
2
QD48T033050
Conditions: T
A
= 25ºC, Airflow = 300 LFM (1.5 m/s), Vin = 48 VDC, unless otherwise specified.
PARAMETER
Absolute Maximum Ratings
Input Voltage
Operating Ambient Temperature
Storage Temperature
CONDITIONS / DESCRIPTION
Continuous
MIN
0
-40
-55
36
TYP
MAX
80
85
125
UNITS
VDC
°C
°C
VDC
VDC
VDC
VDC
Input Characteristics
Operating Input Voltage Range
Input Under Voltage Lockout
Turn-on Threshold
Turn-off Threshold
Non-latching
33
31
100 ms
34
32
35
33
100
48
75
Input Transient Withstand (Susceptibility)
Output Characteristics
External Load Capacitance
3.3 V
5.0 V
Output Current Range
3.3 V
5.0 V
Current Limit Inception
3.3 V
5.0 V
Peak Short-Circuit Current
3.3 V
5.0 V
RMS Short-Circuit Current
3.3 V
5.0 V
Plus full load (resistive)
Plus full load (resistive)
At nominal output voltage 3.3 V
At nominal output voltage 5.0 V
Non-latching
Non-latching
Non-latching. Short=10mΩ.
Non-latching. Short=10mΩ.
Non-latching
Non-latching
2000
1.3
10
435
1
10,000
4.700
0
0
17
11.5
18.5
13
20
15
15
10
20
15
30
30
4
4
μF
μF
ADC
ADC
ADC
ADC
A
A
Arms
Arms
VDC
ρF
MΩ
kHz
Isolation Characteristics
I/O Isolation
Isolation Capacitance
Isolation Resistance
Feature Characteristics
Switching Frequency
Output Voltage Trim Range
3.3 V
5.0 V
Output Over-Voltage Protection
3.3 V
5.0 V
Over-Temperature Shutdown (PCB)
Auto-Restart Period
Turn-On Time
ON/OFF Control (Positive Logic)
Converter Off
Converter On
ON/OFF Control (Negative Logic)
Converter Off
Converter On
2.4
-20
20
0.8
VDC
VDC
-20
2.4
0.8
20
VDC
VDC
See section: Output Voltage Adjust/TRIM
-10
-10
3.85
5.85
4.125
6.15
120
100
4
Simultaneous with 3.3 V output
Non-latching
Non-latching
Non-latching
Applies to all protection features
5.0 V 3.3 V tracks 5.0 V
+10
+10
4.25
6.4
%
%
V
V
°C
ms
ms
tech.support@psbel.com
QD48T033050
Input Characteristics
Maximum Input Current
Input Stand-by Current
Input No Load Current (0 load on the output)
Input Reflected-Ripple Current
Input Voltage Ripple Rejection
3.3 VDC @ 15 ADC, 5.0 VDC @ 10 ADC,
Vin = 36 V
Vin = 48 V, converter disabled
Vin = 48 V, converter enabled
See Figure 36 - 25MHz bandwidth
120Hz
2.6
72
6
TBD
3.2
ADC
mAdc
mAdc
3
mAPK-PK
dB
Output Characteristics
Output Voltage Set Point (no load)
3.3 V
5.0 V
Output Regulation
Over Line
3.3 V
5.0 V
Over Load
2
3.3 V
5.0 V
Cross Regulation
3
3.3 V
5.0 V
Output Voltage Range
3.3 V
5.0 V
Output Ripple and Noise - 25MHz bandwidth
3.3 V
5.0 V
±2
±2
-10
-6
For Iout2 (5.0 V) change from 0 to 10 A
For Iout1 (3.3 V) change from 0 to 15 A
Over line, load and cross regulation
Over line, load and cross regulation
Full load + 1
μF
ceramic
Full load + 1
μF
ceramic
ΔIout
= 25% of IoutMax
Co = 10
μF
tant. + 1
μF
ceramic (Fig.23)
Co = 10
μF
tant. + 1
μF
ceramic (Fig.24)
40
50
100
20
di/dt = 5 A/μS
3.3 V
5.0 V
Setting Time to 1%
3.3 V
5.0 V
Co = 300
μF
tant. + 1
μF
ceramic (Fig.25)
Co = 300
μF
tant. + 1
μF
ceramic (Fig.26)
90
90
60
60
88
89
mV
mV
µs
µs
%
%
mV
mV
µs
µs
3.234
4.9
20
25
-3
-5
3.366
5.100
30
35
mV
mV
mV
mV
mV
mV
VDC
VDC
mVPK-PK
mVPK-PK
-40ºC to 85ºC
-40ºC to 85ºC
3.267
4.950
3.300
5.000
3.333
5.050
VDC
VDC
Dynamic Response
Load Change: 50% to 75% to 50%
di/dt = 0.1 A/μS
3.3 V
5.0 V
Setting Time to 1%
3.3 V
5.0 V
Efficiency
3.3 V 100% Load, 5.0V 100% Load
3.3 V 50% Load, 5.0V 50% Load
1)
2)
3)
Vout1 and Vout2 can be simultaneously increased or decreased up to 10% via the Trim function. When trimming up, in order
not to exceed the converter‘s maximum allowable output power capability equal to the product of the nominal output voltage
and the allowable output current for the given conditions, the designer must, if necessary, decrease the maximum current
(originally obtained from the derating curves) by the same percentage to ensure the converter’s actual output power remains
at or below the maximum allowable output power.
Load regulation is affected with resistance of the output pins (approximately 0.3 mΩ) since there is no remote sense.
Cross regulation is affected with resistance of the RETURN pin (approximately 0.3 mΩ) since there is no remote sense.
Asia-Pacific
+86 755 298 85888
Europe, Middle East
+353 61 225 977
North America
+1 408 785 5200
BCD.00790_AB
© 2016 Bel Power Solutions & Protection
4
QD48T033050
These power converters have been designed to be stable with no external capacitors when used in low inductance input
and output circuits.
However, in many applications, the inductance associated with the distribution from the power source to the input of the
converter can affect the stability of the converter. The addition of a 33 µF electrolytic capacitor with an ESR < 1
across
the input helps ensure stability of the converter. In many applications, the user has to use decoupling capacitance at the
load. The converter will exhibit stable operation with external load capacitance up to 10,000 µF on 3.3 V and 4,700uF on 5
V output.
The ON/OFF pin is used to turn the power converter on or off remotely via a system signal. There are two remote control
options available, positive logic and negative logic and both are referenced to Vin(-). Typical connections are shown in
Fig. 1.
Vin (+)
Q
TM
Family
Vout2 (+)
TRIM
RTN
Rload1
Rload2
Converter
(Top View)
Vin
ON/OFF
Vin (-)
CONTROL
INPUT
Vout1 (+)
Figure 1. Circuit configuration for ON/OFF function.
The positive logic version turns on when the ON/OFF pin is at logic high and turns off when at logic low. The converter is on
when the ON/OFF pin is left open.
The negative logic version turns on when the pin is at logic low and turns off when the pin is at logic high. The ON/OFF pin
can be hard wired directly to Vin(-) to enable automatic power up of the converter without the need of an external control
signal.
ON/OFF pin is internally pulled-up to 5 V through a resistor. A mechanical switch, open collector transistor, or FET can be
used to drive the input of the ON/OFF pin. The device must be capable of sinking up to 0.2 mA at a low level voltage of
0.8 V. An external voltage source of ±20 V max. may be connected directly to the ON/OFF input, in which case it should be
capable of sourcing or sinking up to 1 mA depending on the signal polarity. See the Start-up Information section for system
timing waveforms associated with use of the ON/OFF pin.
The converter’s output voltages can be adjusted simultaneously up 10% or down 10% relative to the rated output voltages
by the addition of an externally connected resistor. For output voltage 3.3 V, trim up to 10% is guaranteed only at Vin
≥
40
V, and it is marginal (8% to 10%) at Vin = 36 V.
The TRIM pin should be left open if trimming is not being used. To minimize noise pickup, a 0.1 µF capacitor is connected
internally between the TRIM and RETURN pins.
Q
Vin (+)
Family
Converter
(Top View)
TM
Vout2 (+)
TRIM
RTN
Rload1
R
T-INCR
Rload2
Vin
ON/OFF
Vin (-)
Vout1 (+)
Figure 2. Configuration for increasing output voltage.
tech.support@psbel.com
QD48T033050
5
To increase the output voltage (refer to Fig. 2), a trim resistor, R
T-INCR
, should be connected between the TRIM (Pin 6) and
RETURN (Pin 5), with a value from the table below.
Vin (+)
Family
Converter
(Top View)
Q
TM
Vout2 (+)
TRIM
RTN
Rload1
R
T-DECR
Rload2
Vin
ON/OFF
Vin (-)
Vout1 (+)
Figure 3. Configuration for decreasing output voltage.
To decrease the output voltage, a trim resistor R
T-DECR
, (Fig. 3) should be connected between the TRIM (Pin 6) and Vout1(+)
pin (Pin 4), with a value from the table below, where:
Δ
= percentage of increase or decrease Vout(NOM).
Note 1:
Both outputs are trimmed up or down simultaneously.
TRIM RESISTOR
(VOUT INCREASE)
Δ
[%]
1
2
3
4
5
6
7
8
9
10
TRIM RESISTOR
(VOUT DECREASE)
Δ
[%]
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
R
T-INCR
[k
Ω
]
54.9
24.9
14.3
9.31
6.34
4.32
2.80
1.69
0.825
0
R
T-DECR
[k
Ω
]
68.1
30.1
17.8
11.5
7.68
5.36
3.48
2.10
1.05
0
Note 2:
The above trim resistor values match those typically used in industry-standard dual quarter bricks.
Asia-Pacific
+86 755 298 85888
Europe, Middle East
+353 61 225 977
North America
+1 408 785 5200
BCD.00790_AB
© 2016 Bel Power Solutions & Protection
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