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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA1733
SWITCHING
P-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The
µ
PA1733 is P-Channel MOS Field Effect Transistor
designed for power management applications of
notebook computers and Li-ion battery protection circuit.
8
PACKAGE DRAWING (Unit: mm)
5
1,2,3 ; Source
; Gate
4
5,6,7,8 ; Drain
FEATURES
•
Low on-resistance
1.44
R
DS(on)1
= 10.3 mΩ TYP. (V
GS
= –10 V, I
D
= –5.0 A)
1.8 MAX.
1
5.37 MAX.
4
6.0 ±0.3
4.4
+0.10
–0.05
R
DS(on)2
= 14.6 mΩ TYP. (V
GS
= –4.5 V, I
D
= –5.0 A)
R
DS(on)3
= 16.5 mΩ TYP. (V
GS
= –4.0 V, I
D
= –5.0 A)
•
Low C
iss
: C
iss
=2600 pF TYP.
•
Small and surface mount package (Power SOP8)
0.8
0.15
0.05 MIN.
0.5 ±0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
ORDERING INFORMATION
PART NUMBER
PACKAGE
Power SOP8
µ
PA1733G
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Drain Current (pulse)
Note1
Note2
EQUIVALENT CIRCUIT
Drain
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
T
ch
T
stg
–30
m
20
m
10
m
40
V
V
A
A
W
°C
°C
Source
Gate
Body
Diode
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
2.0
150
–55 to + 150
2
Notes 1.
PW
≤
10
µ
s, Duty Cycle
≤
1%
2.
Mounted on ceramic substrate of 1200 mm x 2.2 mm
Remark
Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G14988EJ2V1DS00 (2nd edition)
Date Published May 2001 NS CP(K)
Printed in Japan
The mark
#
shows major revised points.
©
2000
GD32 MCU
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