Composite Transistors
UN601
Silicon PNP epitaxial planer transistor (Tr)
Silicon schottky barrier diode (Di)
Unit: mm
M
Di ain
sc te
on na
tin nc
ue e/
d
2.5±0.2
For DC–DC converter
1.5±0.2
(1.05)
q
q
q
Two elements incorporated into one package. (Tr+Di)
Reduction of the mounting area and assembly cost by one half.
Automatic mounting possible through 12mm wide emboss-tap-
ing supply.
0.25±0.1
q
2SA1674+MA720
0.6±0.1
(0.4)
s
Absolute Maximum Ratings
Parameter
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CP
T
j
Collector to base voltage
Collector to emitter voltage
4.5±0.2
(Ta=25˚C)
–80
–80
–5
–1
Ratings
Unit
V
V
V
A
A
Mini-Power Type Package (6–Pin)
Marking Symbol:
6A
Internal Connection
1
2
3
Transistor block
Emitter to base voltage
Collector current
0 to 0.1
s
Basic Part Number of Element
Peak collector current
Total power dissipation
P
T*1
T
stg
V
R
Junction temperature
Diode block
*2
Peak forward current
I
F(AV)
I
FSM
T
j
nt
in
Reverse voltage
ue
Storage temperature
Non-Repetitive peak forward current
Non-Repetitive peak forward voltage
Junction temperature
/D
V
RRM
T
stg
*1
*2
Be careful about the charge of a human body and leakage of the equip-
ment used.
Pl
e
Rated input/output frequency: 400MHz
Note: This Schottky barrier diode is sensitive to electric shock (static elec-
tricity, etc.).
M
ai
nt
en
Printed circuit board: Copper foil area of 4cm
2
or more and thickness of
1.7mm for the collector portion.
an
Storage temperature
pl d in
as
an c
e
ed lud
pl
vi
an m m es
si
tf
ed ain ai fo
ol
lo dis dis ten nte llow
ht w c
tp in o co an nan in
:// g nt n ce c g
pa U in tin t e fo
na RL ue ue ype typ ur
so a d t d
e Pr
od
ni bo yp typ
c. u e e
uc
ne t l
d
tl
at
ife
t/s e
cy
c/ st
en in
cl
e
fo
st
rm
ag
at
e.
io
n.
1
2
3
6
5
4
s
Features
(φ0.8)
(0.7)
6-0.4±0.1
4-1.5±0.1
4.5±0.2
0.05±0.05
–1.5
0.5
6
5
4
W
150
˚C
–55 to +150
40
˚C
V
500
1.5
40
mA
A
V
is
co
ce
125
˚C
–55 to +125
˚C
1.8±0.1
1
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–
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