MCP3202
2.7V Dual Channel 12-Bit A/D Converter
with SPI Serial Interface
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
12-bit resolution
±1 LSB maximum DNL
±1 LSB maximum INL (MCP3202-B)
±2 LSB maximum INL (MCP3202-C)
Analog inputs programmable as single-ended or
pseudo-differential pairs
On-chip sample and hold
SPI Serial Interface (Modes 0,0 and 1,1)
Single supply operation: 2.7V-5.5V
100 ksps maximum sampling rate at V
DD
= 5V
50 ksps maximum sampling rate at V
DD
= 2.7V
Low power CMOS technology
500 nA typical standby current, 5 µA maximum
550 µA maximum active current at 5V
Industrial temp range: -40°C to +85°C
8-pin MSOP, PDIP, SOIC and TSSOP packages
Description
The MCP3202 is a successive approximation 12-bit
analog-to-digital (A/D) converter with on-board sample
and hold circuitry.
The MCP3202 is programmable to provide a single
pseudo-differential input pair or dual single-ended
inputs. Differential Nonlinearity (DNL) is specified at
±1 LSB, and Integral Nonlinearity (INL) is offered in
±1 LSB (MCP3202-B) and ±2 LSB (MCP3202-C)
versions.
Communication with the device is done using a simple
serial interface compatible with the SPI protocol. The
device is capable of conversion rates of up to 100 ksps
at 5V and 50 ksps at 2.7V.
The MCP3202 operates over a broad voltage range,
2.7V to 5.5V. Low-current design permits operation with
typical standby and active currents of only 500 nA and
375 µA, respectively.
The MCP3202 is offered in 8-pin MSOP, PDIP, TSSOP
and 150 mil SOIC packages.
Applications
•
•
•
•
Sensor Interface
Process Control
Data Acquisition
Battery Operated Systems
Package Types
PDIP, MSOP, SOIC, TSSOP
CS/SHDN
1
2
3
4
8
7
6
5
V
DD
/V
REF
CLK
D
OUT
D
IN
MCP3202
Functional Block Diagram
V
DD
V
SS
CH0
CH1
V
SS
CH0
CH1
Input
Channel
Mux
DAC
Comparator
Sample
and
Hold
Control Logic
CS/SHDN D
IN
CLK
12-Bit SAR
Shift
Register
D
OUT
1999-2011 Microchip Technology Inc.
DS21034F-page 1
MCP3202
1.0
ELECTRICAL
CHARACTERISTICS
† Notice:
Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
Absolute Maximum Ratings †
V
DD
- V
SS
.........................................................................7.0V
All Inputs and Outputs w.r.t. V
SS
............. -0.6V to V
DD
+ 0.6V
Storage Temperature.....................................-65°C to +150°C
Ambient temperature with power applied.......-65°C to +150°C
Maximum Junction Temperature (T
J
) ......................... .+150°C
ESD Protection On All Pins (HBM)
4 kV
ELECTRICAL CHARACTERISTICS
Electrical Characteristics:
Unless otherwise noted, all parameters apply at V
DD
= 5.5V, V
SS
= 0V,
T
A
= -40°C to +85°C, f
SAMPLE
= 100 ksps and f
CLK
= 18*f
SAMPLE
.
Parameter
Conversion Rate:
Conversion Time
Analog Input Sample Time
Sym
t
CONV
t
SAMPLE
Min.
—
Typ.
—
1.5
Max.
12
Units
clock
cycles
clock
cycles
ksps
ksps
bits
LSB
LSB
LSB
LSB
LSB
dB
dB
dB
V
See Sections
3.1
and
4.1
mV
A
Ω
pF
See Sections
3.1
and
4.1
V
IN
= 0.1V to 4.9V@1 kHz
V
IN
= 0.1V to 4.9V@1 kHz
V
IN
= 0.1V to 4.9V@1 kHz
V
DD
= V
REF
= 5V
V
DD
= V
REF
= 2.7V
Conditions
Throughput Rate
f
SAMPL
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Harmonic Distortion
Signal-to-Noise and Distortion
(SINAD)
Spurious Free Dynamic Range
Input Voltage Range for CH0 or
CH1 in Single-Ended Mode
Input Voltage Range for IN+ in
Pseudo-Differential Mode
Input Voltage Range for IN- in
Pseudo-Differential Mode
Leakage Current
Switch Resistance
Sample Capacitor
Data Coding Format
High Level Input Voltage
Low Level Input Voltage
INL
DNL
—
—
—
—
DC Accuracy:
12
—
±0.75
—
±1
—
±0.5
100
50
±1
±2
±1
MCP3202-B
MCP3202-C
No missing codes over
temperature
THD
SINAD
SFDR
—
±1.25
±3
—
±1.25
±5
Dynamic Performance:
—
-82
—
—
72
—
—
86
—
Analog Inputs:
V
SS
—
V
DD
IN-
V
SS
-100
—
—
V
DD
+IN-
V
SS
+100
IN+
IN-
R
SS
C
SAMPLE
V
IH
V
IL
—
.001
±1
—
1k
—
—
20
—
Digital Input/Output:
Straight Binary
0.7 V
DD
—
—
—
—
0.3 V
DD
See
Figure 4-1
See
Figure 4-1
V
V
Note 1:
This parameter is established by characterization and not 100% tested.
2:
Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity performance,
especially at elevated temperatures. See
Section 6.2 “Maintaining Minimum Clock Speed”
for more information.
DS21034F-page 2
1999-2011 Microchip Technology Inc.
MCP3202
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics:
Unless otherwise noted, all parameters apply at V
DD
= 5.5V, V
SS
= 0V,
T
A
= -40°C to +85°C, f
SAMPLE
= 100 ksps and f
CLK
= 18*f
SAMPLE
.
Parameter
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Output Leakage Current
Pin Capacitance
(All Inputs/Outputs)
Timing Parameters:
Clock Frequency
Clock High Time
Clock Low Time
CS Fall To First Rising CLK
Edge
Data Input Setup Time
Data Input Hold Time
CLK Fall To Output Data Valid
CLK Fall To Output Enable
CS Rise To Output Disable
CS Disable Time
D
OUT
Rise Time
D
OUT
Fall Time
Power Requirements:
Operating Voltage
Operating Current
Standby Current
Sym
V
OH
V
OL
I
LI
I
LO
C
IN
, C
OUT
Min.
4.1
—
-10
-10
—
Typ.
—
—
—
—
—
Max.
—
0.4
10
10
10
Units
V
V
µA
µA
pF
Conditions
I
OH
= -1 mA, V
DD
= 4.5V
I
OL
= 1 mA, V
DD
= 4.5V
V
IN
= V
SS
or V
DD
V
OUT
= V
SS
or V
DD
V
DD
= 5.0V (Note
1)
T
A
= +25°C, f = 1 MHz
V
DD
= 5V (Note
2)
V
DD
= 2.7V (Note
2)
f
CLK
t
HI
t
LO
t
SUCS
t
SU
t
HD
t
DO
t
EN
t
DIS
t
CSH
t
R
t
F
—
—
—
—
—
—
—
—
—
—
—
—
—
100
50
50
—
—
—
500
—
—
1.8
0.9
2
2
—
—
—
200
200
100
—
100
100
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
See Test Circuits,
Figure 1-2
See Test Circuits,
Figure 1-2
See Test Circuits,
Figure 1-2
Note 1
See Test Circuits,
Figure 1-2
Note 1
See Test Circuits,
Figure 1-2
Note 1
V
DD
I
DD
I
DDS
2.7
—
—
—
375
0.5
5.5
550
5
V
µA
µA
V
DD
= 5.0V, D
OUT
unloaded
CS = V
DD
= 5.0V
Note 1:
This parameter is established by characterization and not 100% tested.
2:
Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity performance,
especially at elevated temperatures. See
Section 6.2 “Maintaining Minimum Clock Speed”
for more information.
TEMPERATURE CHARACTERISTICS
Electrical Specifications:
Unless otherwise indicated, V
DD
= +2.7V to +5.5V, V
SS
= GND.
Parameters
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 8L-MSOP
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-TSSOP
JA
JA
JA
JA
—
—
—
—
211
89.5
149.5
139
—
—
—
—
°C/W
°C/W
°C/W
°C/W
T
A
T
A
T
A
-40
-40
-65
—
—
—
+85
+85
+150
°C
°C
°C
Sym
Min
Typ
Max
Units
Conditions
1999-2011 Microchip Technology Inc.
DS21034F-page 3
MCP3202
t
CSH
CS
t
SUCS
t
HI
t
LO
CLK
t
SU
D
IN
t
HD
t
R
MSB OUT
MSB IN
t
EN
t
DO
NULL BIT
t
F
LSB
t
DIS
D
OUT
FIGURE 1-1:
Serial Timing.
DS21034F-page 4
1999-2011 Microchip Technology Inc.
MCP3202
Load Circuit for t
DIS
and t
EN
Load Circuit for t
R
, t
F
, t
DO
Test Point
1.4V
3 kΩ
D
OUT
C
L
= 100 pF
Test Point
D
OUT
3 kΩ
100 pF
V
SS
V
DD
V
DD
/2
t
DIS
Waveform 2
t
EN
Waveform
t
DIS
Waveform 1
Voltage Waveforms for t
EN
Voltage Waveforms for t
R
, t
F
V
OH
V
OL
t
R
t
F
CS
CLK
D
OUT
t
EN
1
2
3
4
B11
D
OUT
Voltage Waveforms for t
DO
Voltage Waveforms for t
DIS
CS
V
IH
90%
T
DIS
D
OUT
Waveform 2†
10%
CLK
t
DO
D
OUT
D
OUT
Waveform 1*
* Waveform 1 is for an output with internal conditions
such that the output is high, unless disabled by the
output control.
† Waveform 2 is for an output with internal conditions
such that the output is low, unless disabled by the
output control.
FIGURE 1-2:
Test Circuits.
1999-2011 Microchip Technology Inc.
DS21034F-page 5
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