PD -
97370
Applications
l
DC Motor Drive
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
Benefits
l
Optimized for Logic Level Drive
l
Very Low R
DS(ON)
at 4.5V V
GS
l
Superior R*Q at 4.5V V
GS
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
IRLS4030PbF
IRLSL4030PbF
HEXFET
®
Power MOSFET
D
G
S
V
DSS
R
DS(on)
typ.
max.
I
D
100V
3.4m
Ω
4.3m
Ω
180A
G
D
S
S
D
G
TO-262
IRLSL4030bF
D
2
Pak
IRLS4030PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
c
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
e
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Max.
180
130
730
370
2.5
± 16
21
-55 to + 175
300
Units
A
W
W/°C
V
V/ns
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
d
Avalanche Current
c
Repetitive Avalanche Energy
f
305
See Fig. 14, 15, 22a, 22b
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
Parameter
Junction-to-Case
jk
Junction-to-Ambient (PCB Mount)
ij
Typ.
–––
–––
Max.
0.40
40
Units
°C/W
www.irf.com
1
02/12/09
IRLS/SL4030PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
100
–––
–––
–––
1.0
–––
–––
–––
–––
–––
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
I
DSS
I
GSS
R
G(int)
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
–––
0.10
3.4
3.6
–––
–––
–––
–––
–––
2.1
–––
–––
4.3
4.5
2.5
20
250
100
-100
–––
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 5mAc
mΩ V
GS
= 10V, I
D
= 110A
f
V
GS
= 4.5V, I
D
= 92A
f
V V
DS
= V
GS
, I
D
= 250µA
V
DS
= 100V, V
GS
= 0V
µA
V
DS
= 100V, V
GS
= 0V, T
J
= 125°C
V
GS
= 16V
nA
V
GS
= -16V
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
S
nC
Conditions
V
DS
= 25V, I
D
= 110A
I
D
= 110A
V
DS
= 50V
V
GS
= 4.5V
f
I
D
= 110A, V
DS
=0V, V
GS
= 4.5V
V
DD
= 65V
I
D
= 110A
R
G
= 2.7Ω
V
GS
= 4.5V
f
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 80V
h
V
GS
= 0V, V
DS
= 0V to 80V
g
320 ––– –––
–––
87
130
–––
27
–––
–––
45
–––
–––
42
–––
–––
74
–––
––– 330 –––
––– 110 –––
––– 170 –––
––– 11360 –––
––– 670 –––
––– 290 –––
Effective Output Capacitance (Energy Related)h ––– 760 –––
––– 1140 –––
Effective Output Capacitance (Time Related)g
ns
pF
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
c
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
180
A
730
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
––– –––
1.3
V
–––
50
–––
ns
–––
60
–––
–––
88
–––
nC
T
J
= 125°C
––– 130 –––
–––
3.3
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 110A, V
GS
= 0V
f
T
J
= 25°C
V
R
= 85V,
T
J
= 125°C
I
F
= 110A
di/dt = 100A/µs
f
T
J
= 25°C
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.05mH
R
G
= 25Ω, I
AS
= 110A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
110A, di/dt
≤
1330A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
R
θ
is measured at TJ approximately 90°C.
R
θJC
value shown is at time zero.
2
www.irf.com
IRLS/SL4030PbF
1000
TOP
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
1000
TOP
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
2.5V
10
2.5V
≤
60µs PULSE WIDTH
Tj = 25°C
1
0.1
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
10
0.1
1
≤
60µs PULSE WIDTH
Tj = 175°C
10
100
1000
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 2.
Typical Output Characteristics
2.5
ID = 110A
V GS = 10V
ID, Drain-to-Source Current (A)
2.0
100
TJ = 175°C
TJ = 25°C
1.5
1.0
10
V DS = 50V
1.0
1
2
≤
60µs PULSE WIDTH
3
4
5
0.5
0.0
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
V GS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
5.0
ID= 110A
V GS, Gate-to-Source Voltage (V)
V DS= 80V
V DS= 50V
4.0
C, Capacitance (pF)
10000
Ciss
3.0
Coss
1000
Crss
2.0
1.0
100
1
10
V DS, Drain-to-Source Voltage (V)
100
0.0
0
20
40
60
80
100
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRLS/SL4030PbF
1000
TJ = 175°C
100
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100µsec
100
10msec
1msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
0.0
0.5
1.0
1.5
2.0
2.5
10
TJ = 25°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1
V GS = 0V
0.1
V SD, Source-to-Drain Voltage (V)
DC
0
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
V (BR)DSS, Drain-to-Source Breakdown Voltage (V)
200
180
160
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
125
Id = 5mA
120
115
110
105
100
95
90
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Temperature ( °C )
140
120
100
80
60
40
20
0
25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
4.5
4.0
3.5
3.0
Energy (µJ)
Fig 10.
Drain-to-Source Breakdown Voltage
1400
EAS , Single Pulse Avalanche Energy (mJ)
1200
1000
800
600
400
200
0
ID
TOP
17A
40A
BOTTOM 110A
2.5
2.0
1.5
1.0
0.5
0.0
-20
0
20
40
60
80
100
120
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting TJ , Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
4
www.irf.com
IRLS/SL4030PbF
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
Ri (°C/W)
τi
(sec)
τ
C
0.0477 0.000071
τ
0.1631
0.1893
0.000881
0.007457
τ
1
τ
2
τ
3
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
Ci
τi/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
0.0001
1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Tj
= 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
350
300
EAR , Avalanche Energy (mJ)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 110A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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