FEMTOCLOCK™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
ICS843SDN
Features
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One differential 3.3V LVPECL output
Crystal oscillator interface designed for 23.2MHz – 30MHz,
18pF parallel resonant crystal
Output frequency range: 116MHz – 150MHz
VCO range: 580MHz – 750MHz
Output duty cycle range: 47% – 53%
RMS phase jitter @ 120MHz, using a 24MHz crystal
(12kHz – 20MHz): 0.81ps (typical)
Full 3.3V supply mode
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
Available in lead-free (RoHS 6) package
General Description
The ICS843SDN is a Gigabit Ethernet Clock Generator. The
ICS843SDN uses a 24MHz crystal to synthesize 120MHz. The
ICS843SDN uses IDT’s 3
rd
generation low phase noise VCO
technology, and can achieve <1ps rms phase jitter performance
over the 12kHz – 20MHz integration range. The ICS843SDN is
packaged in a small 8-pin TSSOP, making it ideal for use in
systems with limited board space.
Table 1. Frequency Table - Typical Applications
Crystal Frequency (MHz)
25
24
Output Frequency (MHz)
125
120
Block Diagram
25MHz
Pin Assignment
Phase
Detector
VCO
÷5
Q
nQ
V
CCA
V
EE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
CC
Q
nQ
nc
XTAL_IN
OSC
XTAL_OUT
÷25
(fixed)
ICS843SDN
8 Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
1
ICS843SDNAG REV. A
NOVEMBER 13, 2012
ICS843SDN
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Table 2. Pin Descriptions
Number
1
2
3, 4
5
6, 7
8
Name
V
CCA
V
EE
XTAL_OUT
XTAL_IN
nc
nQ, Q
V
CC
Power
Power
Input
Unused
Output
Power
Type
Description
Analog supply pin.
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
No connect.
Differential output pair. LVPECL interface levels.
Core supply pin.
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuos Current
Surge Current
Package Thermal Impedance,
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
129.5C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
=
0°C to 70°C
Symbol
V
CC
V
CCA
I
EE
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
V
CC
– 0.10
Typical
3.3
3.3
Maximum
3.465
V
CC
83
Units
V
V
mA
Table 3B. LVPECL DC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
=
0°C to 70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Current; NOTE 1
Output Low Current; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.4
V
CC
– 2.0
0.6
Typical
Maximum
V
CC
– 0.9
V
CC
– 1.7
1.0
Units
V
V
V
NOTE 1: Outputs termination with 50 to V
CC
– 2V.
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
2
ICS843SDNAG REV. A
NOVEMBER 13, 2012
ICS843SDN
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Table 4. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency; NOTE 1
Equivalent Series Resistance (ESR)
Shunt Capacitance
NOTE: It is not recommended to overdrive the crystal input with an external clock.
NOTE 1:Input frequency is limited to a range of 23.2MHz – 30MHz due to VCO range.
23.2
Test Conditions
Minimum
Typical
Fundamental
30
40
7
MHz
Maximum
Units
pF
AC Electrical Characteristics
Table 5. AC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
=
0°C to 70°C
Parameter
f
OUT
tjit(Ø)
t
R
/ t
F
odc
Symbol
Output Frequency
RMS Phase Jitter, Random;
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
120MHz,
(Integration Range: 12kHz – 20MHz)
20% to 80%
100
47
Test Conditions
Minimum
116
0.81
600
53
Typical
Maximum
150
Units
MHz
ps
ps
%
NOTE 1: Please refer to Phase Noise Plot.
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
3
ICS843SDNAG REV. A
NOVEMBER 13, 2012
ICS843SDN
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Typical Phase Noise at 120MHz
120MHz
RMS Phase Jitter (Random)
12kHz to 20MHz = 0.81ps (typical)
Noise Power
dBc
Hz
Offset Frequency (Hz)
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
4
ICS843SDNAG REV. A
NOVEMBER 13, 2012
ICS843SDN
FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
Parameter Measurement Information
2V
2V
Noise Power
Phase Noise Plot
V
CC
V
CCA
Qx
SCOPE
Phase Noise Mask
nQx
V
EE
f
1
Offset Frequency
f
2
-1.3V ± 0.165V
-
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V LVPECL Output Load AC Test Circuit
RMS Phase Jitter
nQ
Q
nQ
80%
➤
➤
Q
80%
V
SW I N G
20%
t
R
t
F
20%
Output Duty Cycle/Pulse Width/Period
IDT™ / ICS™
3.3V LVPECL CLOCK GENERATOR
➤
➤
Output Rise/Fall Time
5
ICS843SDNAG REV. A
NOVEMBER 13, 2012
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