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SY100E404JZ-TR

Description
AND/NAND Gate, 100E Series, 4-Func, 2-Input, ECL, PQCC28, LEAD FREE, PLASTIC, LCC-28
Categorylogic    logic   
File Size121KB,4 Pages
ManufacturerMicrel ( Microchip )
Websitehttps://www.microchip.com
Environmental Compliance
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SY100E404JZ-TR Overview

AND/NAND Gate, 100E Series, 4-Func, 2-Input, ECL, PQCC28, LEAD FREE, PLASTIC, LCC-28

SY100E404JZ-TR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerMicrel ( Microchip )
package instructionQCCJ,
Reach Compliance Codecompliant
series100E
JESD-30 codeS-PQCC-J28
JESD-609 codee3
length11.48 mm
Logic integrated circuit typeAND/NAND GATE
Humidity sensitivity level2
Number of functions4
Number of entries2
Number of terminals28
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)0.725 ns
Certification statusNot Qualified
Maximum seat height4.57 mm
surface mountYES
technologyECL
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
width11.48 mm
Base Number Matches1
Micrel, Inc.
QUAD DIFFERENTIAL
AND/NAND
SY10E404
SY100E404
SY10E404
SY100E404
FEATURES
s
Differential D and Q
s
Extended 100E V
EE
range of –4.2V to –5.5V
s
s
s
s
700ps max. propagation delay
High frequency outputs
Internal 75K
input pull-down resistors
Fully compatible with Motorola 10E/100E404
DESCRIPTION
The SY10/100E404 are 4-bit differential AND/NAND
devices. The differential operation of these devices make
them ideal for pulse shaping applications where duty cycle
skew is critical. Special design techniques were
incorporated to minimize the skew between the upper
and lower level gate inputs.
Because a negative 2-input NAND function is
equivalent to a 2-input OR function, the differential inputs
and outputs of the devices also allow for their use as
fully differential 2-input OR/NOR functions.
The output RISE/FALL times of these devices are
significantly faster than most other standard ECLinPS
devices, resulting in an increased bandwidth.
The differential inputs have clamp structures which
will force the Q output of a gate in an open input condition
to go to a LOW state. Thus, inputs of unused gates can
be left open and will not affect the operation of the rest
of the device.
s
Available in 28-pin PLCC package
BLOCK DIAGRAM
D
0a
D
0a
D
0b
D
0b
D
1a
D
1a
D
1b
D
1b
D
2a
D
2a
D
2b
D
2b
D
3a
D
3a
D
3b
D
3b
Q
0
Q
0
PIN NAMES
Pin
D[0:4], D[0:4]
Q[0:4], Q[0:4]
V
CCO
Q
1
Q
1
Function
Differential Data Inputs
Differential Data Outputs
V
CC
to Output
Q
2
Q
2
Q
3
Q
3
M9999-032206
hbwhelp@micrel.com or (408) 955-1690
Rev.: G
Amendment: /0
1
Issue Date: March 2006

SY100E404JZ-TR Related Products

SY100E404JZ-TR SY100E404JZTR SY10E404JZTR
Description AND/NAND Gate, 100E Series, 4-Func, 2-Input, ECL, PQCC28, LEAD FREE, PLASTIC, LCC-28 100E SERIES, QUAD 2-INPUT AND/NAND GATE, PQCC28, LEAD FREE, PLASTIC, LCC-28 10E SERIES, QUAD 2-INPUT AND/NAND GATE, PQCC28, LEAD FREE, PLASTIC, LCC-28
Is it Rohs certified? conform to conform to conform to
Maker Micrel ( Microchip ) Micrel ( Microchip ) Micrel ( Microchip )
package instruction QCCJ, QCCJ, QCCJ,
Reach Compliance Code compliant compliant compliant
series 100E 100E 10E
JESD-30 code S-PQCC-J28 S-PQCC-J28 S-PQCC-J28
JESD-609 code e3 e3 e3
length 11.48 mm 11.48 mm 11.48 mm
Logic integrated circuit type AND/NAND GATE AND/NAND GATE AND/NAND GATE
Humidity sensitivity level 2 2 1
Number of functions 4 4 4
Number of entries 2 2 2
Number of terminals 28 28 28
Maximum operating temperature 70 °C 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ QCCJ QCCJ
Package shape SQUARE SQUARE SQUARE
Package form CHIP CARRIER CHIP CARRIER CHIP CARRIER
Peak Reflow Temperature (Celsius) 260 260 260
propagation delay (tpd) 0.725 ns 0.725 ns 0.725 ns
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 4.57 mm 4.57 mm 4.57 mm
surface mount YES YES YES
technology ECL ECL ECL
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn) MATTE TIN
Terminal form J BEND J BEND J BEND
Terminal pitch 1.27 mm 1.27 mm 1.27 mm
Terminal location QUAD QUAD QUAD
Maximum time at peak reflow temperature 40 40 40
width 11.48 mm 11.48 mm 11.48 mm
Base Number Matches 1 1 -
Is it lead-free? - Lead free Lead free
Parts packaging code - QLCC QLCC
Contacts - 28 28

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