Freescale Semiconductor
Advance Information
Document Number: 33937
Rev. 6.0, 9/2009
Three Phase Field Effect
Transistor Pre-driver
The 33937 and 33937A are Field Effect Transistor (FET) pre-
drivers designed for three phase motor control and similar
applications. The 33937A has been specifically enhanced to
improve performance when driving very high current loads. The
integrated circuit (IC) uses
SMARTMOS
™
technology.
The IC contains three High Side FET pre-drivers and three Low
Side FET pre-drivers.Three external bootstrap capacitors provide
gate charge to the High Side FETs.
The IC interfaces to a MCU via six direct input control signals,
an SPI port for device setup and asynchronous reset, enable and
interrupt signals. Both 5.0 and 3.0 V logic level inputs are
accepted and 5.0 V logic level outputs are provided.
Features
• Fully specified from 8.0 to 40 V covers 12 and 24 V automotive
systems
• Extended operating range from 6.0 to 58 V covers 12 and 42 V
systems
• Greater than 1.0 A gate drive capability with protection
• Protection against reverse charge injection from CGD and CGS
of external FETs
• Includes a charge pump to support full FET drive at low battery
voltages
• Deadtime is programmable via the SPI port
• Simultaneous output capability enabled via safe SPI command
• Pb-free packaging designated by suffix code EK
V
SYS
VPUMP
PUMP
VPWR
VLS
VDD
VSS
3
3
3
33937
33937A
THREE-PHASE PRE-DRIVER
EK SUFFIX (Pb-FREE)
98ASA99334D
54-PIN SOICW-EP
ORDERING INFORMATION
Device
MCZ33937EK/R2
MCZ33937AEK/R2
Temperature
Range (T
A
)
-40
°
C to 135
°
C
Package
54 SOICW-EP
33937
VSUP
PA_HS_G
PB_HS_G
PC_HS_G
PA_HS_S
PB_HS_S
PC_HS_S
MCU
OR
DSP
PX_HS
PX_LS
PHASEX
CS
SI
SCLK
SO
RST
INT
EN1
GND
EN2
PA_LS_G
PB_LS_G
PC_LS_G
PX_LS_S
AMP_P
AMP_N
AMP_OUT
R
SEN
Figure 1. 33937 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2008-2009. All rights reserved.
DEVICE VARIATIONS
DEVICE VARIATIONS
Table 1. Device Variations
Freescale Part No.
MCZ33937
Significant Device Variations
Loss of regulation during indeterminate RESET level
High Bootstrap initialization current causes reset
MCZ33937A
Invalid zero length SPI commands cause Framing Errors
Reference Location
Note 2 on page
7
Caution on page
28
Framing Error on page
37
33937
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
PUMP
VPWR
VSUP
VPUMP
PGND
MAIN
CHARGE
PUMP
TRICKLE
CHARGE
PUMP
5.0 V
REG.
VDD
OSCILLATOR
UV
DETECT
3X
HOLD
-OFF
CIRCUIT
VLS
REG.
VLS
VDD
RST
INT
EN1
EN2
PX_HS
PX_LS
CS
SI
SCLK
SO
PHASEX
OC_OUT
GND(2)
+
-
OVER-CUR.
COMP.
3
3
3
T-LIM
VSUP
+
DESAT. 1.4 V
-
COMP
+
-
HIGH
SIDE
DRIVER
PX_BOOT
PX_HS_G
CONTROL
LOGIC
PX_HS_S
+
-
PHASE
VSUP
COMP.
LOW
SIDE
DRIVER
PX_LS_G
+
-
I-SENSE
AMP.
AMP_N
AMP_P
VLS_CAP
PX_LS_S
VSS OC_TH AMP_OUT
Figure 2. 33937 Simplified Internal Block Diagram
33937
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
PIN CONNECTIONS
PHASEA
PGND
EN1
EN2
RST
N/C
PUMP
VPUMP
VSUP
PHASEB
PHASEC
PA_HS
PA_LS
VDD
PB_HS
PB_LS
INT
CS
SI
SCLK
SO
PC_LS
PC_HS
AMP_OUT
AMP_N
AMP_P
OC_OUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
.35
34
33
32
31
30
29
28
Transparent
Top View
VPWR
N/C
N/C
VLS
N/C
N/C
PA_BOOT
PA_HS_G
PA_HS_S
PA_LS_G
PA_LS_S
PB_BOOT
PB_HS_G
PB_HS_S
PB_LS_G
PB_LS_S
PC_BOOT
PC_HS_G
PC_HS_S
PC_LS_G
PC_LS_S
N/C
VLS_CAP
GND1
GND0
VSS
OC_TH
Figure 3. 33937 Pin Connections
Table 2. 33937 Pin Definitions
A functional description of each pin can be found in the
Functional Pin Description
section beginning on
page 23.
Pin
1
2
3
4
5
6, 33, 49,
50, 52, 53
7
8
9
10
11
Pin Name
PHASEA
PGND
EN1
EN2
RST
N/C
PUMP
VPUMP
VSUP
PHASEB
PHASEC
Pin Function
Digital Output
Ground
Digital Input
Digital Input
Digital Input
–
Power Drive
Out
Power Input
Analog Input
Digital Output
Digital Output
Formal Name
Phase A
Power Ground
Enable 1
Enable 2
Reset
No Connect
Pump
Voltage Pump
Supply Voltage
Phase B
Phase C
Definition
Totem Pole output of Phase A comparator. This output is low when the
voltage on PA_HS_S (Source of High Side FET) is less than 50% of V
SUP
Power ground for charge pump
Logic signal input must be high (ANDed with EN2) to enable any gate drive
output.
Logic signal input must be high (ANDed with EN1) to enable any gate drive
output
Reset input
Do not connect these pins
Charge pump output
Charge pump supply
Supply voltage to the load. This pin is to be connected to the common
Drains of the external High Side FETs
Totem Pole output of Phase B comparator. This output is low when the
voltage on PB_HS_S (Source of High Side FET) is less than 50% of V
SUP
Totem Pole output of Phase C comparator. This output is low when the
voltage on PC_HS_S (Source of High Side FET) is less than 50% of V
SUP
33937
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
Table 2. 33937 Pin Definitions (continued)
A functional description of each pin can be found in the
Functional Pin Description
section beginning on
page 23.
Pin
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30, 31
32
34
35
36
37
38
39
40
41
42
43
44
Pin Name
PA_HS
PA_LS
VDD
PB_HS
PB_LS
INT
CS
SI
SCLK
SO
PC_LS
PC_HS
AMP_OUT
AMP_N
AMP_P
OC_OUT
OC_TH
VSS
GND
VLS_CAP
PC_LS_S
PC_LS_G
PC_HS_S
PC_HS_G
PC_BOOT
PB_LS_S
PB_LS_G
PB_HS_S
PB_HS_G
PB_BOOT
PA_LS_S
Pin Function
Digital Input
Digital Input
Analog Output
Digital Input
Digital Input
Digital Output
Digital Input
Digital Input
Digital Input
Digital Output
Digital Input
Digital Input
Analog Output
Analog Input
Analog Input
Digital Output
Formal Name
Phase A High Side
Phase A Low Side
VDD Regulator
Phase B High Side
Phase B Low Side
Interrupt
Chip Select
Serial In
Serial Clock
Serial Out
Phase C Low Side
Phase C High Side
Amplifier Output
Amplifier Invert
Amplifier Non-Invert
Over-current Out
Definition
Active low input logic signal enables the High Side Driver for Phase A
Active high input logic signal enables the Low Side Driver for Phase A
VDD regulator output capacitor connection.
Active low input logic signal enables the High Side Driver for Phase B
Active high input logic signal enables the Low Side Driver for Phase B
Interrupt pin output
Chip Select input. It frames SPI commands and enables SPI port
Input data for SPI port. Clocked on the falling edge of SCLK, MSB first
Clock for SPI port and typically is 3.0 MHz
Output data for SPI port. Tri-state until CS becomes low
Active high input logic signal enables the Low Side Driver for Phase C
Active low input logic signal enables the High Side Driver for Phase C
Output of the current-sensing amplifier
Inverting input of the current-sensing amplifier
Non-inverting input of the current-sensing amplifier
Totem pole digital output of the Over-current Comparator
Analog Input Over-current Threshold Threshold of the over-current detector
Ground
Ground
Voltage Source Supply Ground reference for logic interface and power supplies
Ground
Substrate and ESD reference, connect to VSS
VLS Regulator connection for additional output capacitor, providing low
impedance supply source for Low Side Gate Drive
Source connection for Phase C Low Side FET
Analog Output VLS Regulator Output
Capacitor
Power Input
Phase C Low Side
Source
Power Output Phase C Low Side Gate Gate drive output for Phase C Low Side
Drive
Power Input
Power Output
Analog Input
Power Input
Phase C High Side
Source
Phase C High Side
Gate Drive
Phase C Bootstrap
Phase B Low Side
Source
Source connection for Phase C High Side FET
Gate Drive for output Phase C High Side FET
Bootstrap capacitor for Phase C
Source connection for Phase B Low Side FET
Power Output Phase B Low Side Gate Gate Drive for output Phase B Low Side
Drive
Power Input
Power Output
Analog Input
Power Input
Phase B High Side
Source
Phase B High Side
Gate Drive
Phase B Bootstrap
Phase A Low Side
Source
Source connection for Phase B High Side FET
Gate Drive for output Phase B High Side
Bootstrap capacitor for Phase B
Source connection for Phase A Low Side FET
33937
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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