TMS320C204PZL-25 datasheet, PDF

TMS320C204PZL-25: Description16-BIT, 80MHz, OTHER DSP, PQFP100, TQFP-100; CategoryThe embedded processor and controller Microcontrollers and processors; File Size258KB，7 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

Stay tuned Parametric Compare

TMS320C204PZL-25 Overview

16-BIT, 80MHz, OTHER DSP, PQFP100, TQFP-100

Parameter Name	Attribute value
Maker	Texas Instruments
Parts packaging code	QFP
package instruction	LFQFP,
Contacts	100
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	16
barrel shifter	YES
boundary scan	YES
maximum clock frequency	80 MHz
External data bus width	16
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-PQFP-G100
length	14 mm
low power mode	YES
Number of DMA channels
Number of external interrupt devices	4
Number of serial I/Os	1
Number of terminals	100
Number of timers	1
On-chip data RAM width	16
On-chip program ROM width	16
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
RAM (number of words)	544
ROM programmability	MROM
Maximum seat height	1.6 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches	1

	TMS320C204PZL-25	TMS320C204PZL-50
Description	16-BIT, 80MHz, OTHER DSP, PQFP100, TQFP-100	16-BIT, 40MHz, OTHER DSP, PQFP100, TQFP-100
Maker	Texas Instruments	Texas Instruments
Parts packaging code	QFP	QFP
package instruction	LFQFP,	LFQFP,
Contacts	100	100
Reach Compliance Code	unknown	unknown
ECCN code	3A001.A.3	3A991.A.2
Address bus width	16	16
barrel shifter	YES	YES
boundary scan	YES	YES
maximum clock frequency	80 MHz	40 MHz
External data bus width	16	16
Format	FIXED POINT	FIXED POINT
Integrated cache	NO	NO
Internal bus architecture	MULTIPLE	MULTIPLE
JESD-30 code	S-PQFP-G100	S-PQFP-G100
length	14 mm	14 mm
low power mode	YES	YES
Number of external interrupt devices	4	4
Number of serial I/Os	1	1
Number of terminals	100	100
Number of timers	1	1
On-chip data RAM width	16	16
On-chip program ROM width	16	16
Maximum operating temperature	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFQFP	LFQFP
Package shape	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH
Certification status	Not Qualified	Not Qualified
RAM (number of words)	544	544
ROM programmability	MROM	MROM
Maximum seat height	1.6 mm	1.6 mm
Nominal supply voltage	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
width	14 mm	14 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches	1	1

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components