BU-61580P3-302 datasheet, PDF - EEWORLD Datasheet

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BU-61580P3-302: DescriptionMil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, CPGA70, PGA-70; CategoryThe embedded processor and controller Microcontrollers and processors; File Size358KB，46 Pages; ManufacturerData Device Corporation

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BU-61580P3-302 Overview

Mil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, CPGA70, PGA-70

BU-61580P3-302 Parametric

Parameter Name	Attribute value
Parts packaging code	PGA
package instruction	PGA, PGA70(UNSPEC)
Contacts	70
Reach Compliance Code	compliant
Address bus width	16
boundary scan	NO
letter of agreement	MIL-STD-1553A; MIL-STD-1553B; MCAIR; STANAG-3838
Data encoding/decoding methods	BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.125 MBps
External data bus width	16
JESD-30 code	R-CPGA-P70
length	48.26 mm
low power mode	YES
Number of serial I/Os	2
Number of terminals	70
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA70(UNSPEC)
Package shape	RECTANGULAR
Package form	GRID ARRAY
power supply	5 V
Certification status	Not Qualified
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	25.4 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553
Base Number Matches	1

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BU-65170/61580 AND BU-61585

MIL-STD-1553A/B NOTICE 2 RT

AND BC/RT/MT, ADVANCED

COMMUNICATION ENGINE (ACE)

Make sure the next

Card you purchase

has...

FEATURES

•

Fully Integrated MIL-STD-1553

Interface Terminal

•

Flexible Processor/Memory Interface

•

Standard 4K x 16 RAM and Optional

12K x 16 or 8K x 17 RAM Available

•

Optional RAM Parity Generation/

Checking

•

Automatic BC Retries

•

Programmable BC Gap Times

•

BC Frame Auto-Repeat

•

Flexible RT Data Buffering

•

Programmable

llegalization

DESCRIPTION

DDC's BU-65170, BU-61580 and BU-61585 Bus Controller / Remote

Terminal / Monitor Terminal (BC/RT/MT) Advanced Communication

Engine (ACE) terminals comprise a complete integrated interface

between a host processor and a MIL-STD-1553 A and B or STANAG

3838 bus.

The ACE series is packaged in a 1.9 -square-inch, 70-pin, low-profile,

cofired MultiChip Module (MCM) ceramic package that is well suited

for applications with stringent height requirements.

The BU-61585 ACE integrates dual transceiver, protocol, memory

management, processor interface logic, and a total of 12K words of

RAM in a choice of DIP or flat pack packages. The BU-61585 requires

+5 V power and either -15 V or -12 V power.

The BU-61585 internal RAM can be configured as 12K x 16 or 8K x

17. The 8K x 17 RAM feature provides capability for memory integri-

ty checking by implementing RAM parity generation and verification

on all accesses. To minimize board space and “glue” logic, the ACE

provides ultimate flexibility in interfacing to a host processor and inter-

nal/external RAM.

The advanced functional architecture of the ACE terminals provides

software compatibility to DDC's Advanced Integrated Multiplexer

(AIM) series hybrids, while incorporating a multiplicity of architectural

enhancements. It allows flexible operation while off-loading the host

processor, ensuring data sample consistency, and supports bulk data

transfers.The ACE hybrids may be operated at either 12 or 16 MHz.

Wire bond options allow for programmable RT address (hardwired is

standard) and external transmitter inhibit inputs.

•

Selective Message Monitor

•

Simultaneous RT/Monitor Mode

FOR MORE INFORMATION CONTACT:

Data Device Corporation

105 Wilbur Place

Bohemia, New York 11716

631-567-5600 Fax: 631-567-7358

www.ddc-web.com

Technical Support:

1-800-DDC-5757 ext. 7771

All trademarks are the property of their respective owners.

1992, 1999 Data Device Corporation

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