LPC2119/LPC2129
Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP
Flash with 10-bit ADC and CAN
Rev. 03 — 22 December 2004
Product data
1. General description
The LPC2119/LPC2129 are based on a 16/32 bit ARM7TDMI-S™ CPU with real-time
emulation and embedded trace support, together with 128/256 kilobytes (kB) of
embedded high speed flash memory. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at maximum clock rate. For
critical code size applications, the alternative 16-bit Thumb
®
Mode reduces code by
more than 30 % with minimal performance penalty.
With their compact 64 pin package, low power consumption, various 32-bit timers,
4-channel 10-bit ADC, 2 advanced CAN channels, PWM channels and 46 GPIO lines
with up to 9 external interrupt pins these microcontrollers are particularly suitable for
automotive and industrial control applications as well as medical systems and
fault-tolerant maintenance buses. With a wide range of additional serial
communications interfaces, they are also suited for communication gateways and
protocol converters as well as many other general-purpose applications.
2. Features
2.1 Key features
s
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
s
16 kB on-chip Static RAM.
s
128/256 kB on-chip Flash Program Memory. 128-bit wide interface/accelerator
enables high speed 60 MHz operation.
s
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
boot-loader software. Flash programming takes 1 ms per 512 byte line. Single
sector or full chip erase takes 400 ms.
s
EmbeddedICE-RT interface enables breakpoints and watch points. Interrupt
service routines can continue to execute while the foreground task is debugged
with the on-chip RealMonitor™ software.
s
Embedded Trace Macrocell enables non-intrusive high speed real-time tracing of
instruction execution.
s
Two interconnected CAN interfaces with advanced acceptance filters.
s
Four channel 10-bit A/D converter with conversion time as low as 2.44
µs.
s
Multiple serial interfaces including two UARTs (16C550), Fast I
2
C (400 kbits/s)
and two SPIs
s
60 MHz maximum CPU clock available from programmable on-chip
Phase-Locked Loop with settling time of 100
µs.
s
Vectored Interrupt Controller with configurable priorities and vector addresses.
s
Two 32-bit timers (with four capture and four compare channels), PWM unit (six
outputs), Real Time Clock and Watchdog.
Philips Semiconductors
LPC2119/LPC2129
Single-chip 16/32-bit microcontrollers
s
Up to forty-six 5 V tolerant general purpose I/O pins. Up to nine edge or level
sensitive external interrupt pins available.
s
On-chip crystal oscillator with an operating range of 1 MHz to 30 MHz.
s
Two low power modes, Idle and Power-down.
s
Processor wake-up from Power-down mode via external interrupt.
s
Individual enable/disable of peripheral functions for power optimization.
s
Dual power supply:
x
CPU operating voltage range of 1.65 V to 1.95 V (1.8 V
±0.15
V).
x
I/O power supply range of 3.0 V to 3.6 V (3.3 V
±
10 %) with 5 V tolerant I/O
pads.
3. Ordering information
Table 1:
Ordering information
Package
Name
LPC2119FBD64
LPC2129FBD64
LQFP64
LQFP64
Description
Version
plastic low profile quad flat package; 64 leads; SOT314-2
body 10
×
10
×
1.4 mm
plastic low profile quad flat package; 64 leads; SOT314-2
body 10
×
10
×
1.4 mm
Type number
3.1 Ordering options
Table 2:
Part options
Flash memory
128 kB
256 kB
RAM
16 kB
16 kB
CAN
2 channels
2 channels
Temperature
range (°C)
−40
to +85
−40
to +85
Type number
LPC2119FBD64
LPC2129FBD64
9397 750 13146
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 22 December 2004
2 of 34
Philips Semiconductors
LPC2119/LPC2129
Single-chip 16/32-bit microcontrollers
4. Block diagram
TRST(1)
TMS(1)
TCK(1)
TDI(1)
TDO(1)
RTCK
XTAL1
PLL
system
clock
TEST/DEBUG
INTERFACE
EMULATION TRACE
MODULE
SYSTEM
FUNCTIONS
ARM7TDMI-S
AHB BRIDGE
ARM7 LOCAL BUS
VECTORED INTERRUPT
CONTROLLER
AMBA AHB
(Advanced High-performance Bus)
INTERNAL SRAM
CONTROLLER
INTERNAL
FLASH
CONTROLLER
AHB TO VPB
VPB
BRIDGE
DIVIDER
AHB
DECODER
16 kB
SRAM
128/256 kB
FLASH
EINT0*
EINT1*
EINT2*
EINT3*
EXTERNAL
INTERRUPTS
APB
I2C SERIAL
INTERFACE
SCL*
SDA*
8 x CAP*
8 x MAT*
CAPTURE/
COMPARE
TIMER0/TIMER1
SPI SERIAL
INTERFACE 0 & 1
PWM1..6*
PWM0
UART0/UART1
P0 (30 PINS)
P1.31:16
GENERAL
PURPOSE I/O
REAL TIME CLOCK
Ain3:0*
10-BIT
A/D CONVERTER
WATCHDOG
TIMER
RD2:1*
TD2:1*
CAN INTERFACE 0 & 1
ACCEPTANCE FILTERS
SYSTEM
CONTROL
*Shared with GPIO
(1) When test/debug interface is used, GPIO/other function sharing these pins are not available.
Fig 1. Block diagram.
9397 750 13146
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 22 December 2004
XTAL2
RST
V3
V1.8
VSS
SCK*
MOSI*
MISO*
SSEL*
TxD0,1*
RxD0,1*
MODEM CONTROL
(6 PINS)*
002aaa662
3 of 34
Philips Semiconductors
LPC2119/LPC2129
Single-chip 16/32-bit microcontrollers
5. Pinning information
5.1 Pinning
54 P0.19/MAT1.2/MOSI1/CAP1.2
53 P0.18/CAP1.3/MISO1/MAT1.3
55 P0.20/MAT1.3/SSEL1/EINT3
58 VSSA_PLL
52 P1.30/TMS
56 P1.29/TCK
64 P1.27/TD0
60 P1.28/TDI
57 RESET
62 XTAL1
61 XTAL2
59 VSSA
63 V18A
50 VSS
handbook, full pagewidth
P0.21/PWM5/CAP1.3 1
P0.22/CAP0.0/MAT0.0 2
P0.23/RD2 3
P1.19/TRACEPKT3 4
P0.24/TD2 5
VSS 6
V3A 7
P1.18/TRACEPKT2 8
49 V18
51 V3
48 P1.20/TRACESYNC
47 P0.17/CAP1.2/SCK1/MAT1.2
46 P0.16/EINT0/MAT0.2/CAP0.2
45 P0.15/RI1/EINT2
44 P1.21/PIPESTAT0
43 V3
42 VSS
41 P0.14/DCD1/EINT1
LPC2119/LPC2129
P0.25/RD1 9
TD1 10
P0.27/AIN0/CAP0.1/MAT0.1 11
P1.17/TRACEPKT1 12
P0.28/AIN1/CAP0.2/MAT0.2 13
P0.29/AIN2/CAP0.3/MAT0.3 14
P0.30/AIN3/EINT3/CAP0.0 15
P1.16/TRACEPKT0 16
V18 17
VSS 18
P0.0/TxD0/PWM1 19
P1.31/TRST 20
P0.1/RxD0/PWM3/EINT0 21
P0.2/SCL/CAP0.0 22
V3 23
P1.26/RTCK 24
VSS 25
P0.3/SDA/MAT0.0/EINT1 26
P0.4/SCK0/CAP0.1 27
P1.25/EXTIN0 28
P0.5/MISO0/MAT0.1 29
P0.6/MOSI0/CAP0.2 30
P0.7/SSEL0/PWM2/EINT2 31
P1.24/TRACECLK 32
40 P1.22/PIPESTAT1
39 P0.13/DTR1/MAT1.1
38 P0.12/DSR1/MAT1.0
37 P0.11/CTS1/CAP1.1
36 P1.23/PIPESTAT2
35 P0.10/RTS1/CAP1.0
34 P0.9/RxD1/PWM6/EINT3
33 P0.8/TxD1/PWM4
002aaa663
Fig 2. Pinning.
9397 750 13146
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 22 December 2004
4 of 34
Philips Semiconductors
LPC2119/LPC2129
Single-chip 16/32-bit microcontrollers
5.2 Pin description
Table 3:
Symbol
P0.0 to P0.31
Pin description
Pin
Type
Description
Port 0:
Port 0 is a 32-bit bi-directional I/O port with individual direction
controls for each bit. The operation of port 0 pins depends upon the pin
function selected via the Pin Connect Block. Pins 26 and 31 of port 0 are not
available.
19, 21, 22,
I/O
26, 27,
29-31, 33-35,
37-39, 41,
45-47, 53-55,
1-3, 5, 9, 11,
13-15
19
21
O
O
P0.1
I
O
I
P0.2
P0.3
22
26
I/O
I
I/O
O
I
P0.4
27
I/O
I
P0.5
29
I/O
O
P0.6
30
I/O
I
P0.7
31
I
O
I
P0.8
P0.9
33
34
O
O
I
O
I
P0.10
35
O
I
P0.0
TxD0 —
Transmitter output for UART0.
PWM1 —
Pulse Width Modulator output 1.
RxD0 —
Receiver input for UART0.
PWM3 —
Pulse Width Modulator output 3.
EINT0 —
External interrupt 0 input
SCL —
I
2
C clock input/output. Open drain output (for I
2
C compliance).
CAP0.0 —
Capture input for Timer 0, channel 0.
SDA —
I
2
C data input/output. Open drain output (for I
2
C compliance).
MAT0.0 —
Match output for Timer 0, channel 0.
EINT1 —
External interrupt 1 input.
SCK0 —
Serial clock for SPI0. SPI™ clock output from master or input to
slave.
CAP0.1 —
Capture input for Timer 0, channel 1.
MISO0 —
Master In Slave OUT for SPI0. Data input to SPI master or data
output from SPI slave.
MAT0.1 —
Match output for Timer 0, channel 1.
MOSI0 —
Master Out Slave In for SPI0. Data output from SPI master or data
input to SPI slave.
CAP0.2 —
Capture input for Timer 0, channel 2.
SSEL0 —
Slave Select for SPI0. Selects the SPI interface as a slave.
PWM2 —
Pulse Width Modulator output 2.
EINT2 —
External interrupt 2 input.
TxD1 —
Transmitter output for UART1.
PWM4 —
Pulse Width Modulator output 4.
RxD1 —
Receiver input for UART1.
PWM6 —
Pulse Width Modulator output 6.
EINT3 —
External interrupt 3 input.
RTS1 —
Request to Send output for UART1.
CAP1.0 —
Capture input for Timer 1, channel 0.
9397 750 13146
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 22 December 2004
5 of 34