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IDT2309A-1PGI

Description
2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
Categorysemiconductor    logic   
File Size65KB,8 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric View All

IDT2309A-1PGI Overview

2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16

IDT2309A-1PGI Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals16
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage3.6 V
Minimum supply/operating voltage3 V
Rated supply voltage3.3 V
Processing package descriptionLead FREE, SOIC-16
Lead-freeYes
EU RoHS regulationsYes
stateACTIVE
packaging shapeRectangle
Package SizeSMALL OUTLINE
surface mountYes
Terminal formGULL WING
Terminal spacing1.27 mm
terminal coatingMATTE Tin
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelINDUSTRIAL
series2309
Output characteristics3-ST
Enter conditionsstandard
Logic IC typePhase locked loop clock driver
Number of inverted outputs0.0
Real output number8
propagation delay TPD8.7 ns
Maximum same-side bending0.2500 ns
Max-Min frequency133 MHz
IDT2309A
3.3V ZERO DELAY CLOCK BUFFER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
3.3V ZERO DELAY
CLOCK BUFFER
FEATURES:
DESCRIPTION:
IDT2309A
• Phase-Lock Loop Clock Distribution
• 10MHz to 133MHz operating frequency
• Distributes one clock input to one bank of five and one bank of
four outputs
• Separate output enable for each output bank
• Output Skew < 250ps
• Low jitter <200 ps cycle-to-cycle
• IDT2309A-1 for Standard Drive
• IDT2309A-1H for High Drive
• No external RC network required
• Operates at 3.3V V
DD
• Available in SOIC and TSSOP packages
The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT2309A is a 16-pin version of the IDT2305A. The IDT2309A
accepts one reference input, and drives two banks of four low skew clocks.
The -1H version of this device operates up to 133MHz frequency and has
higher drive than the -1 device. All parts have on-chip PLLs which lock
to an input clock on the REF pin. The PLL feedback is on-chip and is
obtained from the CLKOUT pad. In the absence of an input clock, the
IDT2309A enters power down. In this mode, the device will draw less than
12µA for Commercial Temperature range and less than 25µA for Industrial
temperature range, and the outputs are tri-stated.
The IDT2309A is characterized for both Industrial and Commercial
operation.
FUNCTIONAL BLOCK DIAGRAM
16
CLKOUT
1
REF
PLL
2
CLKA1
3
CLKA2
14
CLKA3
15
CLKA4
S2
S1
8
9
Control
Logic
6
CLKB1
7
CLKB2
10
CLKB3
11
CLKB4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
c
2004 Integrated Device Technology, Inc.
JULY 2004
DSC - 6588/5
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