IDT70V26L35J datasheet, PDF - EEWORLD Datasheet

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IDT70V26L35J: DescriptionHIGH-SPEED 3.3V 16K x 16 DUAL-PORT STATIC RAM; File Size146KB，17 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT70V26L35J Overview

HIGH-SPEED 3.3V 16K x 16 DUAL-PORT STATIC RAM

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HIGH-SPEED 3.3V

16K x 16 DUAL-PORT

STATIC RAM

Features

True Dual-Ported memory cells which allow simultaneous

reads of the same memory location

High-speed access

– Commercial: 25/35/55ns (max.)

Low-power operation

– IDT70V26S

Active: 300mW (typ.)

Standby: 3.3mW (typ.)

– IDT70V26L

Active: 300mW (typ.)

Standby: 660

W (typ.)

Separate upper-byte and lower-byte control for multiplexed

bus compatibility

IDT70V26S/L

IDT70V26 easily expands data bus width to 32 bits or more

using the Master/Slave select when cascading more than

one device

M/S = V

for

BUSY

output flag on Master

M/S = V

for

BUSY

input on Slave

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

TTL-compatible, single 3.3V (±0.3V) power supply

Available in 84-pin PGA and PLCC

Industrial temperature range (-40°C to +85°C) is available

for selected speeds

Functional Block Diagram

R/W

I/O

-I/O

15L

I/O

Control

I/O

-I/O

BUSY

13L

(1,2)

I/O

-I/O

15R

I/O

Control

I/O

-I/O

BUSY

Address

Decoder

(1,2)

MEMORY

ARRAY

Address

Decoder

13R

ARBITRATION

SEMAPHORE

LOGIC

SEM

M/S

NOTES:

1. (MASTER):

BUSY

is output; (SLAVE):

BUSY

is input.

BUSY

outputs are non-tri-stated push-pull.

SEM

2945 drw 01

JUNE 2000

DSC 2945/13

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