HD74HC160/HD74HC161/HD74HC162/
HD74HC163
Synchronous Decade Counter (Direct Clear)
Synchronous 4-bit Binary Counter (Direct Clear)
Synchronous Decade Counter (Synchronous Clear)
Synchronous 4-bit Binary Counter (Synchronous Clear)
REJ03D0579-0200
(Previous ADE-205-455)
Rev.2.00
Oct 11, 2005
Description
The HD74HC160 and the HD74HC162 are 4 bit decade counters, and the HD74HC161 and the HD74HC163 are 4 bit
binary counters All flip-flops are clocked simultaneously on the low to high to transition (positive edge) of the clock
input waveform.
These counters may be preset using the load input. Presetting of all four flip-flops is synchronous to the rising edge of
clock. When load is held low counting is disabled and the data on the A, B, C, and D inputs is loaded into the counter
on the rising edge of clock. If the load input is taken high before the positive edge of clock the count operation will be
unaffected.
All of these counters may be cleared by the utilizing clear input. The clear function on the HD74HC162 and
HD74HC163 counters are synchronous to the clock. That is, the counters are cleared on the positive edge of clock
while the clear input is held low.
The HD74HC160 and HD74HC161 counters are cleared asynchronously. When the clear is taken low the counter is
cleared immediately regardless of the clock.
Two active high enable inputs Enable P and Enable T and a ripple carry output are provided to enable easy cascading of
counters. Both enable inputs must be high to count. The Enable T input also enables the Ripple Carry output. When
enabled, the Ripple Carry outputs a positive pulse when the counter overflows. This pulse is approximately equal in
duration to the high level portion of the Q
A
outputs. The Ripple Carry output is fed to successive cascaded stages to
facilitate easy implementation of N-bit counters.
Features
•
•
•
•
•
High Speed Operation: t
pd
(Clock to Q) = 18 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1
µA
max
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
Rev.2.00, Oct 11, 2005 page 1 of 14
HD74HC160, HD74HC161, HD74HC162, HD74HC163
•
Ordering Information
Part Name
HD74HC160P
HD74HC161P
HD74HC162P
HD74HC163P
HD74HC160FPEL
HD74HC161FPEL
HD74HC162FPEL
HD74HC163FPEL
HD74HC160RPEL
HD74HC162RPEL
HD74HC163RPEL
HD74HC161TELL
Package Type
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
Package
Abbreviation
Taping Abbreviation
(Quantity)
DILP-16 pin
P
—
SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
FP
EL (2,000 pcs/reel)
SOP-16 pin (JEDEC)
PRSP0016DG-A
(FP-16DNV)
PTSP0016JB-A
(TTP-16DAV)
RP
EL (2,500 pcs/reel)
TSSOP-16 pin
T
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
Clear*
Load
Enable P
L
X
X
H
L
X
H
H
H
H
H
L
H
H
X
H : High level L : Low level X : Irrelevant
Note: 1. 162 and 163 Only-160 and 161 are Asynchronous Clear Devices
Decade Counter
Clock
1
Outputs
Enable T
X
X
H
X
L
Q
n
Reset-clear
Load input data
Count
No count
No count
Binary Counter
HD74HC161
HD74HC163
Asynchronous clear
Synchronous clear
HD74HC160
HD74HC162
Pin Arrangement
Clear
1
Clock 2
A 3
B 4
Data
Inputs C 5
D 6
Enable P 7
GND 8
(Top view)
CK
A
B
C
D
P
CLR
Ripple
Carry
Q
A
Q
B
Q
C
Q
D
Load
T
16 V
CC
Ripple
15 Carry Output
14 Q
A
13 Q
B
Outputs
12 Q
C
11 Q
D
10 Enable T
9 Load
Rev.2.00, Oct 11, 2005 page 2 of 14
HD74HC160, HD74HC161, HD74HC162, HD74HC163
Logic Diagram
HD74HC160
Decade Counter with Asynchronous Clear
T
1
CLR
C
C
Load
Load
P
1
T
2
CLR
C
C
Load
Load
P
2
T
3
CLR
C
C
Load
Load
P
3
T
4
CLR
C
C
Load
Load
P
4
V
CC
CLR
C
C
Load
Load
Q
A
Q
A
Q
A
A
Q
B
Q
B
Q
B
B
Q
C
Q
C
Q
C
C
Q
D
Q
D
D
Q
D
Enable P
Enable T
Clear
Ripple
Carry
Output
Clock
Load
Rev.2.00, Oct 11, 2005 page 3 of 14
HD74HC160, HD74HC161, HD74HC162, HD74HC163
HD74HC161
4-bit Binary Counter with Asynchronous Clear
A
T
1
CLR
C
C
Load
Load
P
1
T
2
CLR
C
C
Load
Load
P
2
T
3
CLR
C
C
Load
Load
P
3
T
4
CLR
C
C
Load
Load
P
4
Q
A
Q
A
Q
A
Q
B
Q
B
Q
B
B
Q
C
Q
C
Q
C
C
Q
D
Q
D
Q
D
D
Enable P
Enable T
Clear
CLR
C
C
Load
Load
Ripple
Carry
Output
Clock
Load
Rev.2.00, Oct 11, 2005 page 4 of 14
HD74HC160, HD74HC161, HD74HC162, HD74HC163
HD74HC162
Decade Counter with Synchronous Clear
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
Q
A
A
Q
B
B
Q
C
C
Q
D
D
P
T
CK
V
CC
RCO
CK
CK
LD
LD
LD
LD·CLR
LD·CLR
CLR
CLR
CLR
Rev.2.00, Oct 11, 2005 page 5 of 14
Analogue and Mixed Signal
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