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2N6851LCC4-JQR-B

Description
Power Field-Effect Transistor, 4A I(D), 200V, 0.8ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL, TO-39, 3 PIN
CategoryDiscrete semiconductor    The transistor   
File Size117KB,3 Pages
ManufacturerTT Electronics plc
Websitehttp://www.ttelectronics.com/
Download Datasheet Parametric Compare View All

2N6851LCC4-JQR-B Overview

Power Field-Effect Transistor, 4A I(D), 200V, 0.8ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL, TO-39, 3 PIN

2N6851LCC4-JQR-B Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionCYLINDRICAL, O-MBCY-W3
Reach Compliance Codecompliant
ECCN codeEAR99
ConfigurationSINGLE
Minimum drain-source breakdown voltage200 V
Maximum drain current (ID)4 A
Maximum drain-source on-resistance0.8 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-205AF
JESD-30 codeO-MBCY-W3
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Package body materialMETAL
Package shapeROUND
Package formCYLINDRICAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeP-CHANNEL
Certification statusNot Qualified
surface mountNO
Terminal formWIRE
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
Base Number Matches1
P-CHANNEL
POWER MOSFET
2N6851
Hermetic TO39 Metal Package
Dynamic dv/dt Rating
Simple Drive Requirements
Screening Options Available
ABSOLUTE MAXIMUM RATINGS
(Tcase = 25°C unless otherwise stated)
VDS
VGS
ID
ID
IDM
(1)
PD
dv/dt
(2)
TJ
Tstg
Drain – Source Voltage
Gate – Source Voltage
Continuous Drain Current @ Tcase = 25°C
Continuous Drain Current @ Tcase = 100°C
Pulsed Drain Current
Total Power Dissipation @ Tcase = 25°C
Linear De-rating Factor @ Tcase
25°C
Peak Diode Recovery dv/dt
Operating Temperature Range
Storage Temperature Range
-200V
±20V
-4.0A
-2.4A
-16A
25W
200mW/°C
-5V/ns
-55°C to +150°C
-55°C to +150°C
THERMAL CHARACTERISTICS
Symbol
R
θJC
Notes:
1)
2)
3)
4)
Repetitive Rating; Pulse width limited by maximum junction temperature
ISD
-4.0A, di/dt
-120A/µs, VDD
-200V, TJ
150°C
Pulse width
380 µs; Duty Cycle
2%
By design. Not a production test.
Parameters
Thermal Resistance, Junction To Case
Max
5
Units
°C/W
Semelab Limited reserves the right to change test conditions, parameter limits and package dimensions without notice.
Information furnished by Semelab is believed to be both accurate and reliable at the time of going to press. However
Semelab assumes no responsibility for any errors or omissions discovered in its use. Semelab encourages customers to
verify that datasheets are current before placing orders.
Semelab Limited
Coventry Road, Lutterworth, Leicestershire, LE17 4JB
Telephone +44 (0) 1455 556565
Fax +44 (0) 1455 552612
Email:
sales@semelab-tt.com
Document Number 10351
Issue 1
Page 1 of 3
Website:
http://www.semelab-tt.com

2N6851LCC4-JQR-B Related Products

2N6851LCC4-JQR-B 2N6851R1 2N6851LCC4-JQR-A
Description Power Field-Effect Transistor, 4A I(D), 200V, 0.8ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL, TO-39, 3 PIN Power Field-Effect Transistor, 4A I(D), 200V, 0.8ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL, TO-39, 3 PIN Power Field-Effect Transistor, 4A I(D), 200V, 0.8ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL, TO-39, 3 PIN
Is it Rohs certified? incompatible conform to incompatible
package instruction CYLINDRICAL, O-MBCY-W3 CYLINDRICAL, O-MBCY-W3 CYLINDRICAL, O-MBCY-W3
Reach Compliance Code compliant compliant compliant
ECCN code EAR99 EAR99 EAR99
Configuration SINGLE SINGLE SINGLE
Minimum drain-source breakdown voltage 200 V 200 V 200 V
Maximum drain current (ID) 4 A 4 A 4 A
Maximum drain-source on-resistance 0.8 Ω 0.8 Ω 0.8 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95 code TO-205AF TO-205AF TO-205AF
JESD-30 code O-MBCY-W3 O-MBCY-W3 O-MBCY-W3
Number of components 1 1 1
Number of terminals 3 3 3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
Package body material METAL METAL METAL
Package shape ROUND ROUND ROUND
Package form CYLINDRICAL CYLINDRICAL CYLINDRICAL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Polarity/channel type P-CHANNEL P-CHANNEL P-CHANNEL
Certification status Not Qualified Not Qualified Not Qualified
surface mount NO NO NO
Terminal form WIRE WIRE WIRE
Terminal location BOTTOM BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Transistor component materials SILICON SILICON SILICON
Base Number Matches 1 1 1
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