HB56UW3272ETK-F
EO
Description
Features
256MB Buffered EDO DRAM DIMM
32-Mword
×
72-bit, 4k Refresh, 2 Bank Module
(36 pcs of 16M
×
4 components)
E0100H10 (1st edition)
(Previous ADE-203-1124A (Z))
Jan. 31, 2001
The HB 56UW 3272ETK belongs to 8-byte DI MM (D ual in-line Memory Module) fa mily , and has bee n
deve loped an optimiz ed main memory solution for 4 and 8-byte proc essor applica tions.
The
HB 56UW 3272ETK is 32 M
×
72 Dyna mic R AM Module, mounted 36 piec es of 64-Mbit DR AM
(H M5165405) sea led in TS OP pac kage and 2 piec es of 16-bit line drive r sea led in TS SOP pac kage . The
HB56UW3272ETK offers Extended Data Out (EDO) Page Mode as a high speed access mode. An outline of
the HB 56UW 3272ETK is 168-pin socke t type pac kage (dua l lea d out). The ref ore, the HB 56UW 3272ETK
makes high density mounting possible without surface mount technology. The HB56UW3272ETK provides
common data inputs and outputs. De coupling ca pac itor s ar e mounted beside ea ch TS OP on the module
board.
•
168-pin socket type package (Dual lead out)
Outline : 133.35 mm (Length)
×
53.34 mm (Height)
×
4.00 mm (Thickness)
Lead pitch : 1.27 mm
•
Single 3.3 V supply: 3.3
±
0.3V
•
High speed
Access time: t
RAC
= 50 ns/60 ns (max)
Access time: t
CAC
= 18 ns/20 ns (max)
•
Low power dissipation
Active mode: 8.78 W/7.49 W (max)
Standby mode (TTL): 295.2 mW (max)
•
JEDEC standard outline buffered 8-byte DIMM
•
Buffered input except
RAS
and DQ
•
4-byte interleave enabled, dual address input (A0/B0)
•
EDO page mode capability
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
L
o
Pr
du
ct
HB56UW3272ETK-F
Pin Description
EO
Pin name
A0 to A11, B0
DQ0 to DQ71
RE0
to
RE3
WE0, WE2
OE0, OE2
PD1 to PD8
ID0 , ID1
PDE
V
CC
V
SS
NC
CE0, CE1, CE4, CE5
Pin name
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
Pin No.
79
163
80
164
81
165
82
166
50 ns
1
0
0
0
1
0
0
0
4
Function
Address input
Row address (D0 to D35)
Column address (D0 to D35)
Refresh address (D0 to D35)
Data input/output
Row address strobe (RAS)
Column address strobe (CAS)
Read/Write enable
A0 to A11, B0
A0 to A11, B0
A0 to A11, B0
Presence Detect Pin Assignment
(Controlled by
PDE
pin)
PDE
= Low
60ns
1
0
0
0
1
1
1
0
Note: 1: High level (driver output). 0: Low level (driver output)
L
Output enable
Presence detect
ID bit
Presence detect enable
Power supply
Data Sheet E0100H10
o
Pr
Ground
No connection
All
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
PDE
= High
du
ct
RF/Wirelessly
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