54SHSC273CB datasheet, PDF - EEWORLD Datasheet

54SHSC273CB: DescriptionD Flip-Flop, HSC Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20,; Categorylogic logic; File Size4MB，100 Pages; ManufacturerPlessey Semiconductors Ltd.

Download Datasheet Parametric View All

54SHSC273CB Overview

D Flip-Flop, HSC Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20,

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	DIP, DIP20,.3
Reach Compliance Code	unknown
Other features	RADIATION HARD CMOS/SILICON ON SAPPHIRE (SOS) TECHNOLOGY
series	HSC
JESD-30 code	R-CDIP-T20
JESD-609 code	e0
Logic integrated circuit type	D FLIP-FLOP
MaximumI(ol)	0.009 A
Number of digits	8
Number of functions	1
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Prop。Delay @ Nom-Sup	28 ns
propagation delay (tpd)	28 ns
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
Base Number Matches	1

Software - Can I use the Breaking Master on my computer to install Allegro 16.6 and 17.4 at the same time?: I am currently using allegro16.6, and now I want to use 17.4. If I use the Broken Priest Master to install 17.4 now, will it affect the previous 16.6 (for example, malfunction or skill failure?)In add...; 普拉卡图 PCB Design

Problems with getting data from Quantum PLC,: I am making a management software, using VB, and need to get data from Quantum PLC via TCP/IP. I heard that I need to use Modbus protocol to get data. I am not familiar with this protocol. Is there a ...; huzhiming Embedded System

CC3120 Wireless Network Processor BoosterPack Plug-in Module: The SimpleLink Wi-Fi CC3120 wireless network processor gives users the flexibility to add Wi-Fi to any microcontroller (MCU). The CC3120 BoosterPack plug-in module (CC3120BOOST) is a board that easily...; Aguilera Wireless Connectivity

What is the use of GENERATE in VHDL language?: One purpose, two uses: 1) Generate multiple instances of the same component. The example is as follows:for k in 99 downto 0 generateflip_flop : DFFport mapclk = clk,d = din(k),q = dout(k) );end genera...; zl_felix FPGA/CPLD

Simulink and ModelSim co-simulation to realize BLDC six-step square wave closed-loop control system: [i=s]This post was last edited by Guadi on 2020-2-13 17:50[/i]In some cases, the core processor used does not contain motor control related peripherals, and at the same time, there are high requiremen...; 瓜弟 Motor Drive Control（Motor Control）

2004 Autumn (64th) National Electronics Exhibition: 2004 Autumn (64th) National Electronics Exhibition【Source: smta.org.cn】【Author: toptouch】【Time: 2005-1-22 9:06:36】【Click: 2658】2004 Autumn (64th) National Electronics Exhibition——The first Asian Elect...; fighting Analog electronics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components