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5962H9654701VEA

Description
Decoder/Driver, ACT Series, Inverted Output, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
Categorylogic    logic   
File Size266KB,23 Pages
ManufacturerCobham PLC
Download Datasheet Parametric Compare View All

5962H9654701VEA Overview

Decoder/Driver, ACT Series, Inverted Output, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16

5962H9654701VEA Parametric

Parameter NameAttribute value
package instructionDIP, DIP16,.3
Reach Compliance Codeunknown
ECCN code3A001.A.1.A
seriesACT
JESD-30 codeR-XDIP-T16
JESD-609 codee0
length19.05 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeOTHER DECODER/DRIVER
MaximumI(ol)0.008 A
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityINVERTED
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply5 V
Prop。Delay @ Nom-Sup15 ns
propagation delay (tpd)14 ns
Certification statusQualified
Filter level38535V;38534K;883S
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
total dose1M Rad(Si) V
width7.62 mm
Base Number Matches1
REVISIONS
LTR
A
B
C
D
DESCRIPTION
Changes in accordance with NOR 5962-R063-97.
Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. –
LTG
Update boilerplate in according with MIL-PRF-38535 requirement. Correct
voltage level testing in switching waveforms and test circuit, figure 4. Add
appendix A. - PHN
Update Figure 1 with correct pin names. - PHN
DATE (YR-MO-DA)
96-11-18
01-10-02
07-07-24
10-01-12
APPROVED
Monica L. Poelking
Thomas M. Hess
Thomas M. Hess
Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
C
15
C
16
C
17
C
18
REV
SHEET
PREPARED BY
Thanh V. Nguyen
C
19
C
20
C
21
D
1
C
22
C
2
C
3
C
4
C
5
C
6
C
7
C
8
D
9
C
10
C
11
C
12
C
13
C
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
Thanh V. Nguyen
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
APPROVED BY
Monica L. Poelking
MICROCIRCUIT, DIGITAL, ADVANCED CMOS,
RADIATION HARDENED, DUAL 2-LINE TO 4-LINE
DECODER/DEMULTIPLEXER, TTL COMPATIBLE
INPUTS, MONOLITHIC SILICON
DRAWING APPROVAL DATE
96-06-12
REVISION LEVEL
SIZE
A
CAGE CODE
67268
1 OF
22
5962-96547
D
DSCC FORM 2233
APR 97
.
SHEET
5962-E149-10

5962H9654701VEA Related Products

5962H9654701VEA 5962H9654701VEC 5962H9654701QEA 5962H9654701QEC
Description Decoder/Driver, ACT Series, Inverted Output, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 Decoder/Driver, ACT Series, Inverted Output, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 Decoder/Driver, ACT Series, Inverted Output, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 Decoder/Driver, ACT Series, Inverted Output, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
package instruction DIP, DIP16,.3 DIP, DIP16,.3 DIP, DIP16,.3 DIP, DIP16,.3
Reach Compliance Code unknown unknown unknown unknown
ECCN code 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A 3A001.A.1.A
series ACT ACT ACT ACT
JESD-30 code R-XDIP-T16 R-XDIP-T16 R-XDIP-T16 R-XDIP-T16
JESD-609 code e0 e4 e0 e4
length 19.05 mm 19.05 mm 19.05 mm 19.05 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type OTHER DECODER/DRIVER OTHER DECODER/DRIVER OTHER DECODER/DRIVER OTHER DECODER/DRIVER
MaximumI(ol) 0.008 A 0.008 A 0.008 A 0.008 A
Number of functions 2 2 2 2
Number of terminals 16 16 16 16
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C
Output polarity INVERTED INVERTED INVERTED INVERTED
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP DIP DIP DIP
Encapsulate equivalent code DIP16,.3 DIP16,.3 DIP16,.3 DIP16,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE IN-LINE
power supply 5 V 5 V 5 V 5 V
Prop。Delay @ Nom-Sup 15 ns 15 ns 15 ns 15 ns
propagation delay (tpd) 14 ns 14 ns 14 ns 14 ns
Certification status Qualified Qualified Qualified Qualified
Filter level 38535V;38534K;883S 38535V;38534K;883S 38535Q/M;38534H;883B 38535Q/M;38534H;883B
Maximum seat height 5.08 mm 5.08 mm 5.08 mm 5.08 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount NO NO NO NO
technology CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY
Terminal surface TIN LEAD GOLD TIN LEAD GOLD
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm 2.54 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL
total dose 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V 1M Rad(Si) V
width 7.62 mm 7.62 mm 7.62 mm 7.62 mm
Base Number Matches 1 1 1 1
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