5962H9659601VCA datasheet, PDF

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5962H9659601VCA: DescriptionNOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14; Categorylogic logic; File Size93KB，17 Pages; ManufacturerCobham PLC

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5962H9659601VCA Overview

NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14

5962H9659601VCA Parametric

Parameter Name	Attribute value
package instruction	DIP, DIP14,.3
Reach Compliance Code	unknown
ECCN code	3A001.A.1.A
series	AC
JESD-30 code	R-XDIP-T14
JESD-609 code	e0
length	19.43 mm
Logic integrated circuit type	NOR GATE
MaximumI(ol)	0.008 A
Number of functions	2
Number of entries	4
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Prop。Delay @ Nom-Sup	14 ns
propagation delay (tpd)	12 ns
Certification status	Qualified
Schmitt trigger	NO
Filter level	38535V;38534K;883S
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	1M Rad(Si) V
width	7.62 mm
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Changes in accordance with NOR 5962-R136-97. - JB

Add limit for linear energy threshold (LET) with no latch-up in section 1.5.

Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes

throughout. - TVN

DATE (

YR-MO-DA

)

96-11-20

07-01-22

APPROVED

Monica L. Poelking

Thomas M. Hess

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Larry T. Gauder

CHECKED BY

Thanh V. Nguyen

APPROVED BY

Monica L. Poelking

DRAWING APPROVAL DATE

96-04-19

REVISION LEVEL

SIZE

CAGE CODE

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

http://www.dscc.dla.mil

MICROCIRCUIT, DIGITAL, RADIATION HARDENED,

ADVANCED CMOS, DUAL 4-INPUT NOR GATE,

MONOLITHIC SILICON

AMSC N/A

SHEET

67268

5962-96596

DSCC FORM 2233

APR 97

5962-E178-07

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATION

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-883

MIL-STD-1835

Test Method Standard Microcircuits.

Interface Standard Electronic Component Case Outlines.

DEPARTMENT OF DEFENSE HANDBOOKS

MIL-HDBK-103

MIL-HDBK-780

List of Standard Microcircuit Drawings.

Standard Microcircuit Drawings.

(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from

the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The

modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for

device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified

herein.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in

MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Truth table. The truth table shall be as specified on figure 2.

3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.

3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.

3.2.6 Irradiation test connections. The irradiation test connections shall be as specified in table III.

3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and post irradiation parameter limits are as specified in table IA and shall apply over the

full case operating temperature range.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-96596

SHEET

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical

tests for each subgroup are defined in table IA.

3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be

marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer

has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be

marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be

in accordance with MIL-PRF-38535, appendix A.

3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in

MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.

3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of

compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see

6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this

drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and

herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.

3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for

device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2

herein) involving devices acquired to this drawing is required for any change that affects this drawing.

3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the

option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made

available onshore at the option of the reviewer.

3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in

microcircuit group number 36 (see MIL-PRF-38535, appendix A).

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-96596

SHEET

5962H9659601VCA Related Products

	5962H9659601VCA	5962H9659601VXC	5962H9659601QXC	5962H9659601VCC	5962H9659601VXA	5962H9659601QXA	5962H9659601QCC	5962H9659601QCA
Description	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14	NOR Gate, AC Series, 2-Func, 4-Input, CMOS, CDIP14, SIDE BRAZED, CERAMIC, DIP-14
package instruction	DIP, DIP14,.3	DFP, FL14,.3	DFP, FL14,.3	DIP, DIP14,.3	DFP, FL14,.3	DFP, FL14,.3	DIP, DIP14,.3	DIP, DIP14,.3
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	3A001.A.1.A	3A001.A.1.A	3A001.A.1.A	3A001.A.1.A	3A001.A.1.A	3A001.A.1.A	3A001.A.1.A	3A001.A.1.A
series	AC	AC	AC	AC	AC	AC	AC	AC
JESD-30 code	R-XDIP-T14	R-XDFP-F14	R-XDFP-F14	R-XDIP-T14	R-XDFP-F14	R-XDFP-F14	R-XDIP-T14	R-XDIP-T14
JESD-609 code	e0	e4	e4	e4	e0	e0	e4	e0
length	19.43 mm	9.525 mm	9.525 mm	19.43 mm	9.525 mm	9.525 mm	19.43 mm	19.43 mm
Logic integrated circuit type	NOR GATE	NOR GATE	NOR GATE	NOR GATE	NOR GATE	NOR GATE	NOR GATE	NOR GATE
MaximumI(ol)	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A	0.008 A
Number of functions	2	2	2	2	2	2	2	2
Number of entries	4	4	4	4	4	4	4	4
Number of terminals	14	14	14	14	14	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	DFP	DFP	DIP	DFP	DFP	DIP	DIP
Encapsulate equivalent code	DIP14,.3	FL14,.3	FL14,.3	DIP14,.3	FL14,.3	FL14,.3	DIP14,.3	DIP14,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	FLATPACK	FLATPACK	IN-LINE	FLATPACK	FLATPACK	IN-LINE	IN-LINE
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Prop。Delay @ Nom-Sup	14 ns	14 ns	14 ns	14 ns	14 ns	14 ns	14 ns	14 ns
propagation delay (tpd)	12 ns	12 ns	12 ns	12 ns	12 ns	12 ns	12 ns	12 ns
Certification status	Qualified	Qualified	Qualified	Qualified	Qualified	Qualified	Qualified	Qualified
Schmitt trigger	NO	NO	NO	NO	NO	NO	NO	NO
Filter level	38535V;38534K;883S	38535V;38534K;883S	38535Q/M;38534H;883B	38535V;38534K;883S	38535V;38534K;883S	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B
Maximum seat height	5.08 mm	2.921 mm	2.921 mm	5.08 mm	2.921 mm	2.921 mm	5.08 mm	5.08 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	YES	NO	YES	YES	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	TIN LEAD	GOLD	GOLD	GOLD	TIN LEAD	TIN LEAD	GOLD	TIN LEAD
Terminal form	THROUGH-HOLE	FLAT	FLAT	THROUGH-HOLE	FLAT	FLAT	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	1.27 mm	1.27 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
total dose	1M Rad(Si) V	1M Rad(Si) V	1M Rad(Si) V	1M Rad(Si) V	1M Rad(Si) V	1M Rad(Si) V	1M Rad(Si) V	1M Rad(Si) V
width	7.62 mm	6.2865 mm	6.2865 mm	7.62 mm	6.2865 mm	6.2865 mm	7.62 mm	7.62 mm
Base Number Matches	1	1	1	1	1	1	1	1

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