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5962G9653503QXA

Description
D Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14
Categorylogic    logic   
File Size326KB,27 Pages
ManufacturerCobham PLC
Download Datasheet Parametric View All

5962G9653503QXA Overview

D Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, CDFP14, BOTTOM BRAZED, CERAMIC, DFP-14

5962G9653503QXA Parametric

Parameter NameAttribute value
package instructionDFP, FL14,.25
Reach Compliance Codeunknown
ECCN code3A001.A.1.A
seriesACT
JESD-30 codeR-CDFP-F14
JESD-609 codee0
length8.626 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
MaximumI(ol)0.008 A
Number of digits1
Number of functions2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Encapsulate equivalent codeFL14,.25
Package shapeRECTANGULAR
Package formFLATPACK
power supply3.3/5 V
Prop。Delay @ Nom-Sup20 ns
propagation delay (tpd)30 ns
Certification statusQualified
Filter levelMIL-PRF-38535 Class Q
Maximum seat height2.575 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
total dose500k Rad(Si) V
Trigger typePOSITIVE EDGE
width6.477 mm
Base Number Matches1
REVISIONS
LTR
A
B
DESCRIPTION
Changes in accordance with NOR 5962-R142-97.
Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements.
– LTG
Correct the title to accurately describe the device function. Add device types
02
and 03. Add appendix A. Change figure 4, switching waveforms and test
circuit. Update boilerplate to the latest MIL-PRF-38535 requirements. - jak
Add note 9/ to section 1.5 for device types 02 and 03. Add footnote 6/ to
table IB and remove table III, Irradiation test connections. - jak
Correct terminal connections for pin number 8, 9 and 10 in figure 1 and update
boilerplate to current MIL-PRF-38535 requirements. Add information to
footnote 6/ in section 1.5.- MAA
Add equivalent test circuit and footnote 5 in figure 4. Update radiation features
in section 1.5 and SEP table IB - MAA
DATE (YR-MO-DA)
96-12-10
01-09-04
APPROVED
Monica L. Poelking
Thomas M. Hess
C
07-12-13
Thomas M. Hess
D
08-05-05
Thomas M. Hess
E
08-10-17
Thomas M. Hess
F
12-05-10
Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
F
15
F
16
F
17
F
18
REV
SHEET
PREPARED BY
Thanh V. Nguyen
CHECKED BY
Thanh V. Nguyen
F
19
F
20
F
21
F
1
F
22
F
2
F
23
F
3
F
24
F
4
F
25
F
5
F
6
F
7
F
8
F
9
F
10
F
11
F
12
F
13
F
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
APPROVED BY
Monica L. Poelking
DRAWING APPROVAL DATE
96-04-12
REVISION LEVEL
MICROCIRCUIT, DIGITAL, ADVANCED CMOS,
RADIATION HARDENED, DUAL D FLIP-FLOP
WITH CLEAR AND PRESET, TTL COMPATIBLE
INPUTS, MONOLITHIC SILICON
SIZE
A
CAGE CODE
F
67268
SHEET
5962-96535
1 OF 25
DSCC FORM 2233
APR 97
5962-E293-12

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