5962-9475807QYA datasheet, PDF

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5962-9475807QYA: DescriptionSerial IO/Communication Controller, CMOS, CQFP140; CategoryThe embedded processor and controller Microcontrollers and processors; File Size548KB，40 Pages; ManufacturerAeroflex; Websitehttp://www.aeroflex.com/

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5962-9475807QYA Overview

Serial IO/Communication Controller, CMOS, CQFP140

5962-9475807QYA Parametric

Parameter Name	Attribute value
package instruction	GQFF, TPAK140,2.8SQ,25
Reach Compliance Code	unknown
JESD-30 code	S-XQFP-F140
Number of terminals	140
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC
encapsulated code	GQFF
Encapsulate equivalent code	TPAK140,2.8SQ,25
Package shape	SQUARE
Package form	FLATPACK, GUARD RING
power supply	5,-15 V
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum slew rate	270 mA
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	0.635 mm
Terminal location	QUAD
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Add device types 04, 05, and 06. Editorial changes throughout.

Add device types 07, 08, and 09. Update boilerplate. Editorial changes throughout. -

TVN

Changes in accordance with NOR 5962-R002-01. - TVN

Update the boilerplate in accordance with the requirements of MIL-PRF-38535. –

TVN

Update boilerplate to current MIL-PRF-38535 requirements. – CFS

Update case outline Y package dimension A and A1 in figure 1 of Quad flat pack for

device types 07, 08 and 09. - MAA

Update values of t

WP2

, t

RDYL1

, t

RDYL2

, in table I, per GIDEP# GB4-C-12-0005. - PHN

Correct dimensions A, D, and E for case outline X, Figure 1. Update boilerplate to

current MIL-PRF-38535 requirements. - PHN

DATE (

YR-MO-DA

)

96-01-17

99-04-12

00-12-21

01-04-11

07-07-30

11-02-01

12-04-17

13-03-04

APPROVED

Monica L. Poelking

Thomas M. Hess

David Corbett

Thomas M. Hess

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

REV

SHEET

PREPARED BY

Thomas M. Hess

PMIC N/A

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

CHECKED BY

Thomas M. Hess

APPROVED BY

Monica L. Poelking

DRAWING APPROVAL DATE

95-03-28

REVISION LEVEL

SIZE

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

http://www.landandmaritime.dla.mil

MICROCIRCUIT, DIGITAL, SERIAL MICROCODED

MULTI-MODE INTELLIGENT TERMINAL, SILICON

CAGE CODE

AMSC N/A

67268

SHEET

5962-94758

1 OF 38

DSCC FORM 2233

APR 97

5962-E281-13

1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:

Outline letter

Descriptive designator

See figure 1

Terminals

139

140

Package style

Pin grid array

Quad flat pack

1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535.

1.3 Absolute maximum ratings.

Storage temperature range (T

STG

) ........................................................................ -65°C to +150°C

Operating case temperature range (T

) ................................................................ -55°C to +125°C

Transceiver supply voltage (V

Device types 01, 03, 04, 06, 07, 09 .................................................................. -22 V dc

Transceiver supply voltage range (V

Device types 02, 05, 08 .................................................................................... -0.3 V dc to +7.0 V dc

Logic supply voltage range (V

) ........................................................................... -0.3 V dc to +7.0 V dc

Input voltage range (receiver) (V

Device types 01, 03, 04, 06, 07, 09 .................................................................. 42 V

P,L-L

Device types 02, 05, 08 .................................................................................... 10 V

P,L-L

Maximum power dissipation (P

) ........................................................................... 5 W

Logic voltage on any pin range (V

I/O

) ..................................................................... -0.3 V dc to V

+ 0.3 V dc

Logic latch-up immunity (I

) .................................................................................

±150

Logic input current (I

) ...........................................................................................

±10

Peak output current (transmitter) (I

Device types 01, 03, 04, 06, 07, 09 .................................................................. 190 mA

Device types 02, 05, 08 .................................................................................... 1000 mA

Maximum junction temperature (T

Device types 01, 03, 04, 06, 07, 09 .................................................................. +150°C

Device types 02, 05, 08 .................................................................................... +135°C

Receiver common mode input voltage range (V

Device types 01, 03, 04, 06, 07, 09 .................................................................. -11 V dc to +11 V dc

Device types 02, 05, 08 .................................................................................... -5 V dc to +5 V dc

Lead temperature (soldering, 5 seconds) .............................................................. +300°C

Thermal resistance junction-to-case (Θ

): 2/

Cases X and Y .................................................................................................. 7°C/W

__________

Stresses above the absolute maximum rating may cause permanent damage to the device. These are stress ratings only,

and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of

this specification is not recommended. Extended operation at the maximum levels may degrade performance and affect

reliability.

Mounting in accordance with MIL-STD-883, method 1012.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-94758

SHEET

1.4 Recommended operating conditions.

Transceiver supply voltage range (V

Device types 01, 03, 04, 06, 07, 09 .................................................................. +4.75 V dc to +5.5 V dc

Device types 02, 05, 08 .................................................................................... +4.5 V dc to +5.5 V dc

Logic supply voltage range (V

) .......................................................................... +4.5 V dc to +5.5 V dc

Transceiver supply voltage range (V

Device types 01, 04, 07 .................................................................................... -15 V dc

Device types 03, 06, 09 .................................................................................... -12 V dc

Receiver differential voltage (V

Device types 01, 03, 04, 06, 07, 09 .................................................................. 40 V

P-P

Device types 02, 05, 08 .................................................................................... 8.0 V

P-P

Logic dc input voltage range (V

).......................................................................... 0 V dc to V

Receiver common mode input voltage (V

Device types 01, 03, 04, 06, 07, 09 ..................................................................

±10

V dc

Device types 02, 05, 08 ....................................................................................

±5.0

V dc

Driver peak output current (I

Device types 01, 03, 04, 06, 07, 09 .................................................................. 180 mA

Device types 02, 05, 08 .................................................................................... 700 mA

Serial data rate range (S

) .................................................................................... 0 to 1 MHz

Clock duty cycle (D

) ............................................................................................ 50

Case operating temperature range (T

) ................................................................ -55°C to +125°C

Operating frequency (F

) ..................................................................................... 24 MHz

0.01%

1.5 Digital logic testing for device classes Q and V.

Fault coverage measurement of manufacturing

logic tests (MIL-STD-883, method 5012) .......................................................... 95.12 percent

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATION

MIL-PRF-38535

Integrated Circuits, Manufacturing, General Specification for.

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-883

MIL-STD-1835

Test Methods and Procedures for Microelectronics.

Interface Standard Electronic Component Case Outlines.

DEPARTMENT OF DEFENSE HANDBOOKS

MIL-HDBK-103 -

MIL-HDBK-780 -

MIL-HDBK-1553 -

List of Standard Microcircuit Drawings.

Standard Microcircuit Drawings.

Multiplex Application Handbook.

(Copies of these documents are available online at

https://assist.daps.dla.mil/quicksearch/

or from the Standardization

Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094).

2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.

Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-94758

SHEET

IEEE - THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE)

IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture.

(Copies of these documents are available online at

http://www.ieee.org

or from the IEEE Service Center, 445 Hoes Lane,

P.O. Box 1331, Piscataway, NJ 08855–1331).

2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The

modification in the QM plan shall not affect the form, fit, or function as described herein.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535 and herein for device classes Q and V.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.

3.2.3 Block diagram. The block diagram shall be as specified on figure 3.

3.2.4 Boundary scan instruction codes. The boundary scan instruction codes shall be as specified on figure 4.

3.2.5 Timing waveforms. The timing waveforms shall be as specified on figure 5.

3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document

revision level control and shall be made available to the preparing and acquiring activity upon request.

3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full

case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are defined in table I.

3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be

marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer

has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be

marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.

3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in

MIL-PRF-38535.

3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance

submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the

manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein.

3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall

be provided with each lot of microcircuits delivered to this drawing.

3.11 IEEE 1149.1 compliance. Theses devices shall be compliant to IEEE 1149.1.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-94758

SHEET

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