FAN5355 — 1A / 0.8A, 3Mhz. Digitally Programmable TinyBuck
TM
Regulator
March 2008
FAN5355
1A / 0.8A, 3MHz Digitally Programmable TinyBuck
TM
Regulator
Features
91% Efficiency at 3MHz
800mA or 1A Output Current
(1)
Description
The FAN5355 device is a high-frequency, ultra-fast transient
response, synchronous step-down DC-DC converter
optimized for low-power applications using small, low-cost
inductors and capacitors. The FAN5355 supports up to
(1)
800mA or 1A load current.
The device is ideal for mobile phones and similar portable
applications powered by a single-cell Lithium-Ion battery. With
2
an output voltage range adjustable via I C™ interface from
0.75V to 1.975V, the device supports low-voltage DSPs and
processors, core power supplies in smart phones, PDAs, and
handheld computers.
The FAN5355 operates at 3MHz (nominal) fixed switching
frequency using either its internal oscillator or external SYNC
frequency.
During light-load conditions, the regulator includes a PFM
mode to enhance light-load efficiency. The regulator
transitions smoothly between PWM and PFM modes with no
glitches on V
OUT
. Normal PFM (NPFM) mode offers the lowest
quiescent current, at the expense of setpoint accuracy.
Enhanced PFM (EPFM) mode features higher accuracy, as
well as a 25kHz minimum PFM frequency, designed to
prevent the regulator from operating in the audible range. In
shutdown, the current consumption is reduced to less than
2μA, using software shutdown (EN = 1 with EN_DCDC = 0),
and less than 200nA in hardware shutdown (EN = 0).
The serial interface is compatible with Fast/Standard and
2
High-Speed mode I C specifications, allowing transfers up to
3.4Mbps. This interface is used for dynamic voltage scaling
with 12.5mV voltage steps, for reprogramming the mode of
operation (PFM or Forced PWM), or to disable/enable the
output voltage.
The chip's advanced protection features include short-circuit
protection and current and temperature limits. During a
sustained over-current event, the IC shuts down and restarts
after a delay to reduce average power dissipation into a fault.
During start-up, the IC controls the output slew rate to
minimize input current and output overshoot at the end of soft-
start. The IC maintains a consistent soft-start ramp, regardless
of output load during start-up.
The FAN5355 is available in 10-lead MLP (3x3mm) and
12-bump CSP packages.
2.7V to 5.5V Input Voltage Range
6 or 7-bit V
OUT
Programmable from 0.75 to 1.975V
3MHz Fixed-Frequency Operation
Excellent Load and Line Transient Response
Small Size, 1μH Inductor Solution
±2% PWM DC Voltage Accuracy
35ns Minimum On-Time
High-Efficiency, Low-Ripple, Light-Load PFM
Smooth Transition between PWM and PFM
37μA Operating PFM Quiescent Current
Software Selectable 25kHz Minimum PFM Frequency
Prevents Audible Noise in PFM Mode
I C™-Compatible Interface up to 3.4Mbps
Pin-Selectable or I C™ Programmable Output Voltage
On-the-Fly External Clock Synchronization
10-lead MLP (3 x 3mm) or 12-bump CSP Packages
2
2
Applications
SmartReflex™-Compliant Power Supply
Split Supply DSPs and
μP
Solutions OMAP™, XSCALE™
Cell Phones, Smart Phones, PDAs, Digital Cameras, and
Portable Media Players
Micro DC-DC Converter Modules
Handset Graphic Processors (NVIDIA , ATI)
®
I
2
C is a trademark of Philips Corporation.
SmartReflex and OMAP are trademarks of Texas Instruments.
XSCALE is a trademark of Intel Corporation.
NVIDIA is a registered trademark of NVIDIA Corporation.
© 2008 Fairchild Semiconductor Corporation
FAN5355 • Rev. 1.0.4
www.fairchildsemi.com
FAN5355 — 1A / 0.8A, 3Mhz. Digitally Programmable TinyBuck
TM
Regulator
Ordering Information
Slave
Address LSB
Order Number
(4)
V
OUT
Programming
DAC
6
6
6
6
6
7
7
MIN.
0.7500
0.7500
0.7500
0.7500
1.1875
0.7500
0.7500
(3)
(3)
Power-up
Defaults
VSEL0 VSEL1
1.05
1.05
1.05
1.00
1.80
1.05
1.05
1.35
1.35
1.20
1.20
1.80
1.35
1.35
Package
(4)
Option
00
00
02
03
(1)
06
(1)
07
07
(1)
A1
0
0
1
0
0
1
1
A0
0
0
0
0
0
1
1
MAX.
1.5375
1.5375
1.4375
1.5375
1.9750
1.9750
1.9750
(2)
FAN5355UC00X
FAN5355MP00X
FAN5355UC02X
FAN5355UC03X
FAN5355UC06X
FAN5355UC07X
FAN5355MP07X
WLCSP-12, 2.23x1.46mm
MLP-10, 3x3mm
WLCSP-12, 2.23x1.46mm
WLCSP-12, 2.23x1.46mm
WLCSP-12, 2.23x1.46mm
WLCSP-12, 2.23x1.46mm
MLP-10, 3x3mm
Notes:
1. Option 06 and 07 is rated for 1A output current. All other options are rated for 800mA output current.
2. V
OUT
is limited to the maximum voltage for all VSEL codes greater than the maximum V
OUT
listed.
3. V
OUT
may be programmed down 100mV for option 07. Performance below 0.75V is not guaranteed.
4.
All packages are “green” per JEDEC: J-STD-020B standard. The “X” designator specifies tape and reel packaging.
Typical Application
AVIN
Q1
PVIN
C
IN
VIN
EN
VSEL
SYNC
VCCIO
SW
VOUT
L
OUT
C
OUT
PGND
VOUT
MODULATOR
SDA
SCL
AGND
Q2
Figure 1. Typical Application
Component
L1 (L
OUT
)
C
OUT
C
IN
Description
1μH nominal
0603 (1.6x0.8x0.8)
10μF X5R or better
0603 (1.6x0.8x0.8)
4.7μF X5R or better
Vendor
Murata LQM31P
or FDK MIPSA2520
Murata or equivalent
GRM188R60G106ME47D
Murata or equivalent
GRM188R60J475KE19D
Parameter
L
(5)
DCR (series R)
C
(6)
C
(6)
Min.
0.7
Typ.
1.0
100
Max.
1.2
Units
μH
mΩ
5.6
3.0
10.0
4.7
12.0
5.6
μF
μF
Table 1. Recommended External Components
Notes:
5. Minimum L incorporates both tolerance, temperature, and partial saturation effects (L decreases with increasing current).
6. Minimum C is a function of initial tolerance, maximum temperature, and the effective capacitance being reduced due to
frequency, dielectric, and voltage bias effects.
© 2008 Fairchild Semiconductor Corporation
FAN5355 • Rev. 1.0.4
2
www.fairchildsemi.com
FAN5355 — 1A / 0.8A, 3Mhz. Digitally Programmable TinyBuck
TM
Regulator
Pin Configuration
A1
A2
A3
A3
A2
A1
PVIN 1
AVIN 2
10 SW
9 PGND
B1
B2
B3
B3
B2
B1
PAD
SDA 3
8 AGND
AGND
SCL 4
VSEL 5
7 EN
6 VOUT
C1
C2
C3
C3
C2
C1
D1
D2
D3
D3
D2
D1
Top View
Bottom View
Top View
Figure 3. MLP10, 3x3mm
Figure 2. WLCSP- 12, 2.23x1.46mm
Pin Definitions
Pin #
WLCSP
A1, B1
A2
A3
MLP
9
10
1
Name
PGND
SW
PVIN
Description
Power GND.
Power return for gate drive and power transistors. Connect to AGND on PCB. The
connection from this pin to the bottom of C
IN
should be as short as possible.
Switching Node.
Connect to output inductor.
Power Input Voltage.
Connect to input power source. The connection from this pin to C
IN
should be as
short as possible.
Sync.
When toggling and SYNC_EN bit is HIGH, the regulator synchronizes to the frequency on this pin.
In PWM mode, when this pin is statically LOW or statically HIGH, or when its frequency is outside of the
specified capture range, the regulator’s frequency is controlled by its internal 3MHz clock.
Analog Input Voltage.
Connect to input power source as close as possible to the input bypass
capacitor.
Analog GND.
This is the signal ground reference for the IC. All voltage levels are measured with respect
to this pin.
Enable.
When this pin is HIGH, the circuit is enabled. When LOW, quiescent current is minimized. This
pin should not be left floating.
SDA.
I
2
C interface serial data.
Output Voltage Monitor.
Tie this pin to the output voltage. This is a signal input pin to the control circuit
and does not carry DC current.
Voltage Select.
When HIGH, V
OUT
is set by VSEL1. When LOW, V
OUT
is set by VSEL0. This behavior
can be overridden through I
2
C register settings. This pin should not be left floating.
SCL.
I
2
C interface serial clock.
B2
N/A
SYNC
B3
C1
C2
C3
D1
D2
D3
2
8, PAD
7
3
6
5
4
AVIN
AGND
EN
SDA
VOUT
VSEL
SCL
Note:
7. All logic inputs (SDA, SCL, SYNC, EN, and VSEL) are high impedance and should not be left floating. For minimum
quiescent power consumption, tie unused logic inputs to AVIN or AGND. If I2C control is unused, tie SDA and SCL to AVIN.
© 2008 Fairchild Semiconductor Corporation
FAN5355 • Rev. 1.0.4
3
www.fairchildsemi.com
FAN5355 — 1A / 0.8A, 3Mhz. Digitally Programmable TinyBuck
TM
Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above
the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended
exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings
are stress ratings only.
Symbol
V
CC
ESD
T
J
T
STG
T
L
Parameter
AVIN, SW, PVIN Pins
Other Pins
Electrostatic Discharge Protection Level
Junction Temperature
Storage Temperature
Lead Soldering Temperature, 10 Seconds
Human Body Model per JESD22-A114
Charged Device Model per JESD22-C101
Min.
-0.3
-0.3
3.5
1.5
–40
–65
Max.
6.5
AVIN + 0.3
(8)
Units
V
V
KV
KV
+150
+150
+260
°C
°C
°C
Note:
8. Lesser of 6.5V or V
CC
+0.3V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding
them or designing to absolute maximum ratings.
Symbol
V
IN
f
V
SW
T
A
T
J
Parameter
Supply Voltage
Frequency Range
SDA and SCL Voltage Swing
(9)
Ambient Temperature
Junction Temperature
Min.
2.7
2.7
–40
–40
Max.
5.5
3.3
2.5
+85
+125
Units
V
MHz
V
°C
°C
Note:
9.
The I C interface operates with t
HD;DAT
= 0 as long as the pull-up voltage for SDA and SCL is less than 2.5V. If voltage
2
swings greater than 2.5V are required (for example if the I C bus is pulled up to V
IN
), the minimum t
HD;DAT
must be
2
increased to 80ns. Most I C masters change SDA near the midpoint between the falling and rising edges of SCL, which
provides ample t
HD;DAT
.
2
Dissipation Ratings
(10)
Package
Molded Leadless Package (MLP)
Wafer-Level Chip-Scale Package (WLCSP)
Rθ
JA
(11)
Power Rating at T
A
≤
25°C
2050mW
900mW
Derating Factor > T
A
= 25ºC
21mW/ºC
9mW/ºC
49ºC/W
110ºC/W
Notes:
10. Maximum power dissipation is a function of T
J(max)
,
θ
JA
, and T
A
. The maximum allowable power dissipation at any
allowable ambient temperature is P
D
= [T
J(max)
- T
A
] /
θ
JA
.
11. This thermal data is measured with high-K board (four-layer board according to JESD51-7 JEDEC standard).
© 2008 Fairchild Semiconductor Corporation
FAN5355 • Rev. 1.0.4
4
www.fairchildsemi.com
FAN5355 — 1A / 0.8A, 3Mhz. Digitally Programmable TinyBuck
TM
Regulator
Electrical Specifications
V
IN
= 3.6V, EN = V
IN
, VSEL = V
IN
, SYNC = GND, VSEL0(6) bit = 1, CONTROL2[4:3] = 00. T
A
= -40°C to +85°C, unless otherwise
noted. Typical values are at T
A
= 25°C. Circuit and components according to Figure 1.
Symbol
V
IN
I
Q
Parameter
Input Voltage Range
Conditions
Min.
2.7
Typ.
Max.
5.5
Units
V
μA
μA
mA
Power Supplies
I
O
= 0mA, EPFM Mode, F
PFM
= 25kHz
Quiescent Current
I
O
= 0mA, NPFM Mode
I
O
= 0mA, 3MHz PWM Mode
EN = GND
I
SD
Shutdown Supply Current
EN = V
IN
, EN_DCDC bit = 0,
SDA = SCL = V
IN
V
IN
Rising
V
IN
Falling
2.00
200
1.2
0.4
Input tied to GND or V
IN
V
IN
= 3.6V, CSP Package
R
DS(ON)P
I
LKGP
R
DS(ON)N
I
LKGN
R
DIS
P-channel MOSFET On Resistance
P-channel Leakage Current
N-channel MOSFET On Resistance
N-channel Leakage Current
Discharge Resistor for Power-down
Sequence
V
IN
= 3.6V, MLP Package
V
IN
= 2.7V, MLP Package
V
DS
= 6V
V
IN
= 3.6V, CSP Package
V
IN
= 3.6V, MLP Package
V
IN
= 2.7V, MLP Package
V
DS
= 6V
Options 03, 06, 07
2.7V
≤
V
IN
≤
4.2V, All Options Except 06
and 07
I
LIMPK
P-MOS Current Limit
2.7V
≤
V
IN
≤
5.5V, All Options Except 06
and 07
2.7V
≤
V
IN
≤
4.2V, 06 and 07 Option
T
LIMIT
T
HYST
f
SW
f
SYNC
D
SYNC
f
SYNCVAL
f
PFM(MIN)
Thermal Shutdown
Thermal Shutdown Hysteresis
Oscillator Frequency
Synchronization Range
Synchronization Duty Cycle
SYNC Frequency Rejection
Minimum PFM Frequency
EPFM Mode, I
LOAD
= 0
2.65
2.7
20
1.6
25
1150
1050
1300
15
1350
1350
1550
150
20
3.00
3.0
3.35
3.3
80
4.3
75
95
101
1
50
1600
1600
1800
°C
°C
MHz
MHz
%
MHz
kHz
mA
μA
Ω
mΩ
0.01
145
165
200
1
μA
mΩ
1.00
110
37
4.8
0.1
0.1
2.40
2.15
250
2.0
2.0
2.60
2.30
300
μA
V
V
mV
V
V
μA
150
50
V
UVLO
V
UVHYST
V
IH
V
IL
I
IN
Under-Voltage Lockout Threshold
Under-Voltage Lockout Hysteresis
HIGH-Level Input Voltage
LOW-Level Input Voltage
Input Bias Current
ENABLE, VSEL, SDA, SCL, SYNC
Power Switch and Protection
Frequency Control
Continued on the following page…
© 2008 Fairchild Semiconductor Corporation
FAN5355 • Rev. 1.0.4
5
www.fairchildsemi.com
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