EDE1108AESE-8E-E datasheet, PDF

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EDE1108AESE-8E-E: Description1G bits DDR2 SDRAM; Categorystorage storage; File Size707KB，78 Pages; ManufacturerELPIDA; Websitehttp://www.elpida.com/en; Environmental Compliance

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EDE1108AESE-8E-E Overview

1G bits DDR2 SDRAM

EDE1108AESE-8E-E Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	ELPIDA
Parts packaging code	BGA
package instruction	TFBGA, BGA60,9X11,32
Contacts	60
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	MULTI BANK PAGE BURST
Maximum access time	0.4 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	400 MHz
I/O type	COMMON
interleaved burst length	4,8
JESD-30 code	R-PBGA-B60
JESD-609 code	e1
length	11.5 mm
memory density	1073741824 bi
Memory IC Type	DDR DRAM
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	60
word count	134217728 words
character code	128000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	128MX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA60,9X11,32
Package shape	RECTANGULAR
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.18 mm
self refresh	YES
Continuous burst length	4,8
Maximum slew rate	0.29 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	8 mm

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DATA SHEET

1G bits DDR2 SDRAM

EDE1108AESE (128M words

8 bits)

EDE1116AESE (64M words

16 bits)

Specifications

•

Density: 1G bits

•

Organization



16M words

8 bits

8 banks (EDE1108AESE)



8M words

16 bits

8 banks (EDE1116AESE)

•

Package



60-ball FBGA (EDE1108AESE)



84-ball FBGA (EDE1116AESE)



Lead-free (RoHS compliant)

(EDE1108AESE-xx-E, EDE1116AESE-xx-E)



Lead-free (RoHS compliant) and Halogen-free

(EDE1108AESE-xx-F, EDE1116AESE-xx-F)

•

Power supply: VDD, VDDQ

1.8V

0.1V

•

Data rate



800Mbps/667Mbps (max.)

•

1KB page size (EDE1108AESE)



Row address: A0 to A13



Column address: A0 to A9

•

2KB page size (EDE1116AESE)



Row address: A0 to A12



Column address: A0 to A9

•

Eight internal banks for concurrent operation

•

Interface: SSTL_18

•

Burst lengths (BL): 4, 8

•

Burst type (BT):



Sequential (4, 8)



Interleave (4, 8)

•

/CAS Latency (CL): 3, 4, 5, 6

•

Precharge: auto precharge option for each burst

access

•

Driver strength: normal/weak

•

Refresh: auto-refresh, self-refresh

Features

•

Double-data-rate architecture; two data transfers per

clock cycle

•

The high-speed data transfer is realized by the 4 bits

prefetch pipelined architecture

•

Bi-directional differential data strobe (DQS and /DQS)

is transmitted/received with data for capturing data at

the receiver

•

DQS is edge-aligned with data for READs; center-

aligned with data for WRITEs

•

Differential clock inputs (CK and /CK)

•

DLL aligns DQ and DQS transitions with CK

transitions

•

Commands entered on each positive CK edge; data

and data mask referenced to both edges of DQS

•

Data mask (DM) for write data

•

Posted /CAS by programmable additive latency for

better command and data bus efficiency

•

Off-Chip-Driver Impedance Adjustment and On-Die-

Termination for better signal quality

•

Programmable RDQS, /RDQS output for making

organization compatible to

4 organization

•

/DQS, (/RDQS) can be disabled for single-ended

Data Strobe operation

•

Refresh cycles: 8192 cycles/64ms



Average refresh period

7.8µs at 0°C

≤

≤ +85°C

3.9µs at

+85°C <

≤ +95°C

•

Operating case temperature range



TC = 0°C to +95°C

Document No. E1290E30 (Ver. 3.0)

Date Published January 2009 (K) Japan

Printed in Japan

URL: http://www.elpida.com

Elpida

Memory, Inc. 2008-2009

EDE1108AESE, EDE1116AESE

CONTENTS

Specifications.................................................................................................................................................1

Features.........................................................................................................................................................1

Ordering Information......................................................................................................................................2

Part Number ..................................................................................................................................................2

Pin Configurations .........................................................................................................................................3

Electrical Specifications.................................................................................................................................5

Block Diagram .............................................................................................................................................25

Pin Function.................................................................................................................................................26

Command Operation ...................................................................................................................................28

Simplified State Diagram .............................................................................................................................36

Operation of DDR2 SDRAM ........................................................................................................................37

Package Drawing ........................................................................................................................................74

Recommended Soldering Conditions..........................................................................................................76

Data Sheet E1290E30 (Ver. 3.0)

EDE1108AESE-8E-E Related Products

	EDE1108AESE-8E-E	EDE1116AESE-8E-F	EDE1116AESE-6E-E	EDE1116AESE-6E-F	EDE1116AESE	EDE1108AESE-8E-F	EDE1108AESE	EDE1108AESE-6E-E
Description	1G bits DDR2 SDRAM	1G bits DDR2 SDRAM	1G bits DDR2 SDRAM	1G bits DDR2 SDRAM	1G bits DDR2 SDRAM	1G bits DDR2 SDRAM	1G bits DDR2 SDRAM	1G bits DDR2 SDRAM
Is it Rohs certified?	conform to	conform to	conform to	conform to	-	conform to	-	conform to
Maker	ELPIDA	ELPIDA	ELPIDA	ELPIDA	-	ELPIDA	-	ELPIDA
Parts packaging code	BGA	BGA	BGA	BGA	-	BGA	-	BGA
package instruction	TFBGA, BGA60,9X11,32	TFBGA, BGA84,9X15,32	TFBGA, BGA84,9X15,32	TFBGA, BGA84,9X15,32	-	TFBGA, BGA60,9X11,32	-	TFBGA, BGA60,9X11,32
Contacts	60	84	84	84	-	60	-	60
Reach Compliance Code	unknow	unknow	unknow	unknow	-	unknow	-	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	-	EAR99	-	EAR99
access mode	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	-	MULTI BANK PAGE BURST	-	MULTI BANK PAGE BURST
Maximum access time	0.4 ns	0.4 ns	0.45 ns	0.45 ns	-	0.4 ns	-	0.45 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	-	AUTO/SELF REFRESH	-	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	400 MHz	400 MHz	333 MHz	333 MHz	-	400 MHz	-	333 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	-	COMMON	-	COMMON
interleaved burst length	4,8	4,8	4,8	4,8	-	4,8	-	4,8
JESD-30 code	R-PBGA-B60	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84	-	R-PBGA-B60	-	R-PBGA-B60
JESD-609 code	e1	e1	e1	e1	-	e1	-	e1
length	11.5 mm	12.5 mm	12.5 mm	12.5 mm	-	11.5 mm	-	11.5 mm
memory density	1073741824 bi	1073741824 bi	1073741824 bi	1073741824 bi	-	1073741824 bi	-	1073741824 bi
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	-	DDR DRAM	-	DDR DRAM
memory width	8	16	16	16	-	8	-	8
Number of functions	1	1	1	1	-	1	-	1
Number of ports	1	1	1	1	-	1	-	1
Number of terminals	60	84	84	84	-	60	-	60
word count	134217728 words	67108864 words	67108864 words	67108864 words	-	134217728 words	-	134217728 words
character code	128000000	64000000	64000000	64000000	-	128000000	-	128000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	-	SYNCHRONOUS	-	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	-	85 °C	-	85 °C
organize	128MX8	64MX16	64MX16	64MX16	-	128MX8	-	128MX8
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	-	3-STATE	-	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	TFBGA	TFBGA	TFBGA	TFBGA	-	TFBGA	-	TFBGA
Encapsulate equivalent code	BGA60,9X11,32	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32	-	BGA60,9X11,32	-	BGA60,9X11,32
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	-	RECTANGULAR
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	-	GRID ARRAY	-	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED	-	NOT SPECIFIED
power supply	1.8 V	1.8 V	1.8 V	1.8 V	-	1.8 V	-	1.8 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	-	Not Qualified	-	Not Qualified
refresh cycle	8192	8192	8192	8192	-	8192	-	8192
Maximum seat height	1.18 mm	1.18 mm	1.18 mm	1.18 mm	-	1.18 mm	-	1.18 mm
self refresh	YES	YES	YES	YES	-	YES	-	YES
Continuous burst length	4,8	4,8	4,8	4,8	-	4,8	-	4,8
Maximum slew rate	0.29 mA	0.35 mA	0.31 mA	0.31 mA	-	0.29 mA	-	0.275 mA
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	1.9 V	-	1.9 V	-	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V	-	1.7 V	-	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	-	1.8 V	-	1.8 V
surface mount	YES	YES	YES	YES	-	YES	-	YES
technology	CMOS	CMOS	CMOS	CMOS	-	CMOS	-	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER	-	OTHER	-	OTHER
Terminal form	BALL	BALL	BALL	BALL	-	BALL	-	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	-	0.8 mm	-	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	-	BOTTOM	-	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED	-	NOT SPECIFIED
width	8 mm	8 mm	8 mm	8 mm	-	8 mm	-	8 mm

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