EEWORLDEEWORLDEEWORLD

Part Number

Search

68496-964LF

Description
Board Connector, 64 Contact(s), 2 Row(s), Male, Right Angle, Solder Terminal, LEAD FREE
CategoryThe connector    The connector   
File Size189KB,3 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Environmental Compliance
Download Datasheet Parametric View All

68496-964LF Overview

Board Connector, 64 Contact(s), 2 Row(s), Male, Right Angle, Solder Terminal, LEAD FREE

68496-964LF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerAmphenol
package instructionLEAD FREE
Reach Compliance Codecompliant
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD (5) OVER NICKEL
Contact completed and terminatedGOLD (5) OVER NICKEL
Contact point genderMALE
Contact materialPHOSPHOR BRONZE
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee4
MIL complianceNO
Manufacturer's serial number68496
Mixed contactsNO
Installation methodRIGHT ANGLE
Installation typeBOARD
Number of rows loaded2
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typeSOLDER
Total number of contacts64
UL Flammability Code94V-0
Base Number Matches1
PDM: Rev:AJ
STATUS:
Released
Printed: Nov 06, 2006
.
TI believes that this technology will have huge potential!
[color=#3e3e3e] [color=#3e3e3e] [/color] NIR spectrometers help determine the molecular "fingerprint" of a substance for a range of industries, including agriculture, forensics, pharmaceuticals, petro...
maylove Analogue and Mixed Signal
Show off my DIY USB oscilloscope
Main technical indicators: Maximum sampling rate: 50MSa/S Analog bandwidth: 5M Input impedance: 1MΩ Vertical sensitivity: 4V/div, 2V/div, 1V/div, 0.5V/div, 0.1V/div, 0.05V/div[font=宋体]Total 6[font=宋体]...
cnshs DIY/Open Source Hardware
EEWORLD University Hall----Using Stratix V FPGA, removing external compensation components and reducing system costs
Using Stratix V FPGA, removing external compensation components and reducing system cost : https://training.eeworld.com.cn/course/2135Using Stratix V FPGAs, external compensation components are elimin...
chenyy FPGA/CPLD
Methods to prevent ESD in PCB design
Static electricity from the human body, the environment, and even inside electronic devices can cause various damages to delicate semiconductor chips, such as penetrating the thin insulation layer ins...
ESD技术咨询 PCB Design
Circuit common sense concept 6--MOS tube and simple CMOS logic gate circuit schematic diagram
[p=25, null, left][font=Tahoma,][color=#4e4e4e][font=Arial, Helvetica, simsun, u5b8bu4f53]Modern single-chip microcomputers are mainly made using CMOS technology. [/font][/color][/font][/p][p=25, null...
qinkaiabc Power technology
TI Digital Power Control Solutions
[b][size=4][/size][/b]...
qwqwqw2088 Analogue and Mixed Signal

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2022  2748  1869  2819  1813  41  56  38  57  37 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号