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5962-88724

Description
High Speed UV Erasable Programmable Logic Device
File Size178KB，11 Pages
ManufacturerAtmel (Microchip)
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5962-88724 Overview

High Speed UV Erasable Programmable Logic Device

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AT22V10/L
Features
•
•
High Speed Programmable Logic Device
15 ns Max Propagation Delay
5 V
±10%
Operation
Low Power CMOS Operation
Speed
Temp
I
CC
(mA)
"L"
-15,-20
All
Com./Mil. Com./Mil. Others
12/15
90/100
55
•
•
•
•
•
CMOS and TTL Compatible Inputs and Outputs
10
µA
Leakage Maximum
Reprogrammable - Tested 100% for Programmability
High Reliability CMOS Technology
2000 V ESD Protection
200 mA Latchup Immunity
Full Military, Commercial and Industrial Temperature Ranges
Dual-In-Line and Surface Mount Packages
High Speed
UV Erasable
Programmable
Logic Device
Logic Diagram
OE PRODUCT TERMS
12
INPUT PINS
PROGRAMMABLE
INTERCONNECT
AND
COMBINATORIAL
LOGIC ARRAY
1
LOGIC
OPTION
8 TO 16
PRODUCT
TERMS
(UP T0 10
FLIP-FLOPS)
OUTPUT
OPTION
10
I/O PINS
Description
The AT22V10 and AT22V10L are CMOS high performance EPROM-based Programmable
Logic Devices (PLDs). Speeds down to 15 ns and power dissipation as low as 12 mA are
offered. All speed ranges are specified over the full 5 V
±10%
range. All pins offer a low
±10
µA
leakage.
The AT22V10L provides the optimum low power CMOS PLD solution, with low DC power
(8 mA typical) and full CMOS output levels. The AT22V10L significantly reduces total sys-
tem power and enhances system reliability.
Full CMOS output levels help reduce power in many other system components.
The AT22V10 and AT22V10L incorporate a variable product term architecture. Each output
is allocated from eight to 16 product terms, which allows highly complex logic functions to be
realized.
Two additional product terms are included to provide synchronous preset and asynchronous
reset. These terms are common to all 10 registers. All registers are automatically cleared upon
power up.
Register preload simplifies testing. A security fuse prevents unauthorized copying of pro-
grammed fuse patterns.
DIP/SOIC
PLCC
Pin Configurations
Pin Name
CLK/IN
IN
I/O
*
VCC
Function
Clock and Logic Input
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5 V Supply
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
CLK/IN
IN IN
IN
IN
IN
*
IN
IN
IN
8
*
1
VCC
I/O
I/O
I/O
I/O
I/O
22
*
I/O
I/O
I/O
15
IN
IN
I/O
*
GND IN I/O
0023C
1-97

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