EEWORLDEEWORLDEEWORLD

Part Number

Search

5962F9666302VXC

Description
QUAD LINE DRIVER, UUC16
Categorysemiconductor    Analog mixed-signal IC   
File Size31KB,2 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet Parametric View All

5962F9666302VXC Overview

QUAD LINE DRIVER, UUC16

5962F9666302VXC Parametric

Parameter NameAttribute value
Number of functions4
Number of terminals16
Maximum supply voltage 13.6 V
Minimum supply voltage 13 V
Rated supply voltage 13.3 V
Processing package descriptionDIE-16
Lead-freeYes
EU RoHS regulationsYes
stateACTIVE
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeUNCASED CHIP
surface mountYes
Terminal formNO LEAD
terminal coatingNOT SPECIFIED
Terminal locationUPPER
Packaging MaterialsUNSPECIFIED
Interface TypeLINE DRIVER
Interface standardsEIA-422
Differential outputYes
Number of drive digits4
Input propertiesSTANDARD
HS-26CLV31RH
TM
Data Sheet
August 2000
File Number
4898
Radiation Hardened 3.3V Quad Differential
Line Driver
The Intersil HS-26CLV31RH is a radiation hardened 3.3V
quad differential line driver designed for digital data
transmission over balanced lines, in low voltage, RS-422
protocol applications. CMOS processing assures low power
consumption, high speed, and reliable operation in the most
severe radiation environments.
The HS-26CLV31RH accepts CMOS level inputs and converts
them to differential outputs. Enable pins allow several devices
to be connected to the same data source and addressed
independently. The device has unique outputs that become
high impedance when the driver is disabled or powered-down,
maintaining signal integrity in multi-driver applications.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-96663. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.htm
Features
• Electrically Screened to SMD # 5962-96663
• QML Qualified per MIL-PRF-38535 Requirements
• 1.2 Micron Radiation Hardened CMOS
- Total Dose. . . . . . . . . . . . . . . . . . . . . 300 krad(Si)(Max)
- Single Event Upset LET . . . . . . . . . . .100MeV/mg/cm
2
)
- Single Event Latch-up Immune
• Extremely Low Stand-by Current . . . . . . . . . 100µA (Max)
• Operating Supply Range . . . . . . . . . . . . . . . . 3.0V to 3.6V
• CMOS Level Inputs . . . . V
IH
> (.7)(V
DD
); V
IL
< (.3)(V
DD
)
• Differential Outputs. . . . . . . . . . . V
OH
> 1.8V; V
OL
< 0.5V
• High Impedance Outputs when Disabled or Powered
Down
• Low Output Impedance . . . . . . . . . . . . . . . . . 10Ω or Less
• Full -55
o
C to 125
o
C Military Temperature Range
Pinouts
HS1-26CLV31RH (SBDIP)
CDIP2-T16
TOP VIEW
AIN 1
AO 2
AO 3
ENABLE 4
BO 5
BO 6
BIN 7
GND 8
16 V
DD
15 DIN
14 DO
13 DO
12 ENABLE
11 CO
10 CO
9 CIN
Ordering Information
ORDERING NUMBER
5962F9666302QEC
5962F9666302QXC
5962F9666302V9A
5962F9666302VEC
5962F9666302VXC
INTERNAL
MKT. NUMBER
HS1-26CLV31RH-8
HS9-26CLV31RH-8
HS0-26CLV31RH-Q
HS1-26CLV31RH-Q
HS9-26CLV31RH-Q
TEMP.
RANGE
(
o
C)
-55 to 125
-55 to 125
25
-55 to 125
-55 to 125
-55 to 125
-55 to 125
HS1-26CLV31RH/PROTO HS1-26CLV31RH/PROTO
HS9-26CLV31RH/PROTO HS9-26CLV31RH/PROTO
Logic Diagram
ENABLE
ENABLE
DIN
CIN
BIN
AIN
HS9-26CLV31RH (FLATPACK)
CDFP4-F16
TOP VIEW
AIN
AO
AO
ENABLE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
DIN
DO
DO
ENABLE
CO
CO
CIN
DO DO
CO CO
BO BO
AO AO
BO
BO
BIN
GND
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright © Intersil Corporation 2000
I would like to ask the experts for help on the communication problem between ARM and FPGA~
Because I have only just come into contact with this aspect, I need to solve the interconnection between FPGA and ARM, and transmit the front-end data received by FPGA to ARM, but I don't know how to ...
Candy55 ARM Technology
Freescale KL25EVK-V1 Development Board
[list] [*][color=#000000][font=宋体][size=12pt]KL25EVK[/size][/font][font=宋体][size=12pt]Evaluation board is a set of tools designed by CEC for evaluating and developing Freescale's Kinetis L series MCU ...
louyj Buy&Sell
Ask everyone a question
I have learned a lot about 51 microcontrollers and some AVR. Now I want to learn ARM, using C language. What book should I use? One that is easier to understand?...
BDLOOP Embedded System
I don't know when I'll use it.
[i=s]This post was last edited by paulhyde on 2014-9-15 03:08[/i] Attached links:,,,,,,,,,,,,,,,,,,,,,,,,,,,,,...
QSTNMZ Electronics Design Contest
When the FET430 burning tool burns the chip, it will appear that the download cannot be performed.
Recently, when using FET430 to burn chips, it fails to download (the chip cannot be recognized. This phenomenon often occurs after multiple firmware updates). I can't figure out the reason. It feels l...
wateras1 Microcontroller MCU
May I ask what system is running on the standalone BSP? Thank you!
When developing Microblaze embedded software in SDK , what system is running on the standalone BSP? Does it support single thread or multi thread? Thank you![[i]This post was last edited by smeiyang o...
smeiyang FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2009  297  1364  2300  1352  41  6  28  47  11 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号