AND-OR-Invert Gate, LS Series, 1-Func, 10-Input, TTL, CDFP14, CERAMIC, FP-14
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Motorola ( NXP ) |
| Parts packaging code | DFP |
| package instruction | DFP, FL14,.3 |
| Contacts | 14 |
| Reach Compliance Code | unknown |
| series | LS |
| JESD-30 code | R-GDFP-F14 |
| JESD-609 code | e0 |
| length | 9.65 mm |
| Logic integrated circuit type | AND-OR-INVERT GATE |
| MaximumI(ol) | 0.004 A |
| Number of functions | 1 |
| Number of entries | 10 |
| Number of terminals | 14 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Package body material | CERAMIC, GLASS-SEALED |
| encapsulated code | DFP |
| Encapsulate equivalent code | FL14,.3 |
| Package shape | RECTANGULAR |
| Package form | FLATPACK |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Prop。Delay @ Nom-Sup | 30 ns |
| propagation delay (tpd) | 30 ns |
| Certification status | Not Qualified |
| Schmitt trigger | NO |
| Filter level | 38535Q/M;38534H;883B |
| Maximum seat height | 2.15 mm |
| Maximum supply voltage (Vsup) | 5.5 V |
| Minimum supply voltage (Vsup) | 4.5 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | YES |
| technology | TTL |
| Temperature level | MILITARY |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | FLAT |
| Terminal pitch | 1.27 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 6.415 mm |
| Base Number Matches | 1 |
京公网安备 11010802033920号
EEWORLD
