SN74LS75JS datasheet, PDF - EEWORLD Datasheet

SN74LS75JS: DescriptionD Latch, LS Series, 2-Func, High Level Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16; Categorylogic logic; File Size215KB，4 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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SN74LS75JS Overview

D Latch, LS Series, 2-Func, High Level Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Motorola ( NXP )
Parts packaging code	DIP
package instruction	DIP, DIP16,.3
Contacts	16
Reach Compliance Code	unknown
series	LS
JESD-30 code	R-GDIP-T16
JESD-609 code	e0
length	19.495 mm
Logic integrated circuit type	D LATCH
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
propagation delay (tpd)	27 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	HIGH LEVEL
width	7.62 mm
Base Number Matches	1

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