CTA
Vishay Electro-Films
Thin Film, Center-Tapped Resistor
CHIP
RESISTORS
FEATURES
•
Wire bondable
Product may not
be to scale
•
Center tap feature
•
Tight ratio tolerances to: ± 0.1 %
•
Chip size: 0.030 inches square
•
Resistance range total: 25
Ω
to 35 kΩ
•
Alumina substrate, low shunt capacitance: < 0.2 pF
•
Resistor material nichrome
•
Excellent stability: ± 0.025 % maximum
ΔR/R
The CTA series resistor chips combine the best tolerances,
stability and low shunt capacitance. The CTA offers the
designer flexibility in use as either a single value resistor or
as two resistors with a center tap feature. The CTAs six
bonding pads allows the user increased layout flexibility. The
CTAs are manufactured using Vishay Electro-Films (EFI)
sophisticated thin film equipment and manufacturing
technology. The CTAs are 100 % electrically tested and
visually inspected to MIL-STD-883.
APPLICATIONS
The CTA center-tapped resistor chips are used mainly in
feedback circuits of amplifiers where ratio matching, low
shunt capacitance and tracking between two resistors is
critical.
Recommended for hermetic environments where chip is not
exposed to moisture.
For lower values, the resistance of the six bonding-pad
configurations can vary, depending on the method of
measurement used. Vishay EFI measures low-value
resistors by the four-wire Kelvin technique. The measuring
method is illustrated in the diagram to the right.
I
I
I
R
A
R
B
V
V
V
TEMPERATURE COEFFICIENT OF RESISTANCE, VALUES AND TOLERANCES
Tightest Standard Tolerance Available
PROCESS CODE
0.1 %
± 10 ppm/°C
± 25 ppm/°C
± 50 ppm/°C
± 100 ppm/°C
CLASS H*
203
202
200
201
*MIL-PRF-38534 inspection criteria
CLASS K*
233
232
230
231
25
Ω
100
Ω
200
Ω
1 kΩ
20 kΩ
35 kΩ
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
TCR Tracking Between Halves (R
A
/R
B)
Center Tap Ratio,
R
A
/R
B
: Tolerance
Noise, MIL-STD-202, Method 308
Moisture Resistance, MIL-STD-202, Method 106, (Passivated only)
Stability, 1000 h, + 125 °C, 62 mW
Operating Temperature Range
Thermal Shock, MIL-STD-202, Method 107, Test Condition F
High Temperature Exposure, + 150 °C, 100 h
Insulation Resistance
Operating Voltage
DC Power Rating at + 70 °C (Derated to Zero at + 150 °C)
5 x Rated Power Short-Time Overload, + 25 °C, 5 s
*10ppm/°C for
R
< 100
www.vishay.com
68
For technical questions, contact: efi@vishay.com
Document Number: 61015
Revision: 12-Mar-08
± 2 ppm/°C*
1 ± 1 % standard
- 35 dB typ.
± 0.5 % max.
ΔR/R
± 0.025 % max.
ΔR/R
- 55 °C to + 125 °C
± 0.1 % max.
ΔR/R
± 0.1 % max.
ΔR/R
10
12
min.
100 V max.
125 mW
± 0.25 % max.
ΔR/R
%
CTA
Thin Film, Center-Tapped Resistor
Vishay Electro-Films
DIMENSIONS
in inches
CHIP
RESISTORS
0.030
0.030
STANDARD CONFIGURATION
*Six locations. All pads 0.005 x 0.005
0.005
SCHEMATIC
R
T
=
R
A
+
R
B
R
A
R
B
MECHANICAL SPECIFICATIONS
in inches
PARAMETER
Chip Size
Chip Thickness
Chip Substrate Material
Resistor Material
Bonding Pad Size
Number of Pads
Pad Material
Backing
Options:
Aluminum bonding pads, 10 kÅ minimum
Center-tap ratio tolerances to 0.02 %
R
> 1 kΩ
Consult Applications Engineer
0.030 x 0.030 ± 0.002 (0.762 x 0.762 ± 0.050 mm)
0.010 ± 0.002 (0.254 ± 0.05 mm)
99.6 % alumina
Nichrome
0.005 x 0.005 (0.127 x 0.127 mm)
6
25 kÅ minimum gold
None
ORDERING INFORMATION
Example: 100% visual, 10 kΩ, ± 1 %, ± 100 ppm/°C TCR, gold pads, class H visual inspection
W
INSPECTION/
PACKAGING
W = 100 % visually inspected
parts in matrix trays per
MIL-STD-883
X = Sample, visually inspected
parts loaded in matrix
trays (4 % AQL)
CTA
PRODUCT
FAMILY
201
PROCESS
CODE
See Process Code
table
1000
RESISTANCE
VALUE
Use first 4 digits
significant digits of the
resistance (R
T
)
1
MULTIPLIER
CODE
B
= 0.01
A
= 0.1
0
=1
1
= 10
F
TOLERANCE
CODE
A
= 0.05 %
B
= 0.1 %
C
= 0.2 %
D
= 0.5 %
F
= 1.0 %
G
= 2.0 %
H
= 2.5 %
J
= 5.0 %
K
= 10 %
Document Number: 61015
Revision: 12-Mar-08
www.vishay.com
69
For technical questions, contact: efi@vishay.com
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
www.vishay.com
1
Energy Infrastructure?
京公网安备 11010802033920号
EEWORLD
