Order this document by MC34080/D
t
High Slew Rate, Wide
Bandwidth, JFET Input
Operational Amplifiers
These devices are a new generation of high speed JFET input monolithic
operational amplifiers. Innovative design concepts along with JFET
technology provide wide gain bandwidth product and high slew rate.
Well–matched JFET input devices and advanced trim techniques ensure low
input offset errors and bias currents. The all NPN output stage features large
output voltage swing, no deadband crossover distortion, high capacitive
drive capability, excellent phase and gain margins, low open loop output
impedance, and symmetrical source/sink AC frequency response.
This series of devices is available in fully compensated or
decompensated (AVCL
≤2)
and is specified over a commercial temperature
range. They are pin compatible with existing Industry standard operational
amplifiers, and allow the designer to easily upgrade the performance of
existing designs.
•
Wide Gain Bandwidth: 8.0 MHz for Fully Compensated Devices
Wide Gain Bandwidth:
16 MHz for Decompensated Devices
•
High Slew Rate: 25 V/µs for Fully Compensated Devices
High Slew Rate:
50 V/µs for Decompensated Devices
•
High Input Impedance: 1012
Ω
MC34080
thru
MC34085
HIGH PERFORMANCE
JFET INPUT
OPERATIONAL AMPLIFIERS
8
1
8
1
P SUFFIX
PLASTIC PACKAGE
CASE 626
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
PIN CONNECTIONS
Offset Null
Inv. Input
Noninv. Input
VEE
1
2
3
4
–
+
8
7
6
5
NC
VCC
Output
Offset Null
•
•
•
•
•
Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)
Large Output Voltage Swing: –14.7 V to +14 V for
Large Output Voltage Swing:
VCC/VEE =
±15
V
Low Open Loop Output Impedance: 30
Ω
@ 1.0 MHz
Low THD Distortion: 0.01%
Excellent Phase/Gain Margins: 55°/7.6 dB for Fully Compensated
Devices
ORDERING INFORMATION
(Single, Top View)
Output 1
Inputs 1
VEE
1
2
–
3 +
4
8
7
–
+
6
5
VCC
Output 2
Inputs 2
Op Amp
Function
Single
Dual
Quad
Fully
Compen-
sated
MC34081BD
MC34081BP
MC34082P
MC34084DW
MC34084P
AVCL
≥2
Compensated
MC34080BD
MC34080BP
MC34083BP
MC34085BDW
MC34085BP
Operating
Temperature
Range
(Dual, Top View)
Package
SO–8
TA = 0° to +70°C
70°C
Plastic DIP
Plastic DIP
SO–16L
16
14
1
1
TA = 0° to +70°C
Plastic DIP
P SUFFIX
PLASTIC PACKAGE
CASE 646
PIN CONNECTIONS
Output 1
Inputs 1
3
1
2
–
+
–
+
16
15
14
13
+
–
+
–
12
11
10
9
DW SUFFIX
PLASTIC PACKAGE
CASE 751G
(SO–16L)
14
Output 4
Inputs 4
VEE
Inputs 3
Output 3
NC
Output 1
Inputs 1
1
2
3
–
+
–
+
Output 4
Inputs 4
13
12
11
1
4
1
4
VCC
Inputs 2
4
5
6
VCC
Inputs 2
4
5
6
+
–
+
–
VEE
Inputs 3
Output 3
10
9
8
2
3
2
3
Output 2
NC
7
8
Output 2
7
(Quad, Top View)
©
Motorola, Inc. 1996
Rev 0
MOTOROLA ANALOG IC DEVICE DATA
1
MC34080 thru MC34085
MAXIMUM RATINGS
Rating
Supply Voltage (from VCC to VEE)
Input Differential Voltage Range
Input Voltage Range
Output Short Circuit Duration (Note 2)
Operating Ambient Temperature Range
Operating Junction Temperature
Storage Temperature Range
Symbol
VS
VIDR
VIR
tSC
TA
TJ
Tstg
Value
+44
(Note 1)
(Note 1)
Indefinite
0 to +70
+125
– 65 to +165
Unit
V
V
V
sec
°C
°C
°C
NOTES:
1. Either or both input voltages must not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature
(TJ) is not exceeded.
Representative Schematic Diagram
(Each Amplifier)
VCC
200
µA
50
µA
850
µA
Q1
D1
–
Inputs
+
+
CC
CF
+
Q5
Q2
Q9
500
50
µA
500
Ω
Q10
R6
Q11
D4
RM
100
µA
300
µA
R3
1.0 k
R4
1.0 k
D3
Q3
5.0
pF
20
pF
J1
J2
R1
240
Q6
18
RSC
Output
700
R2
Q7
D2
CM
3.0
pF
Q8
Q4
R7
66 k
VEE
1
Null Adjust
(MC34080, 081)*
5
*Pins 1 & 5 (MC34080,081) should
not
be directly grounded or connected to VCC.
2
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
DC ELECTRICAL CHARACTERISTICS
(VCC = +15 V, VEE = – 15 V, TA = Tlow to Thigh [Note 3], unless otherwise noted.)
Characteristics
Input Offset Voltage (Note 4)
Single
TA = +25°C
TA = 0° to +70°C (MC34080B, MC34081B)
Dual
TA = +25°C
TA = 0° to +70°C (MC34082, MC34083)
Quad
TA = +25°C
TA = 0° to +70°C (MC34084, MC34085)
Average Temperature Coefficient of Offset Voltage
Input Bias Current (VCM = 0 Note 5)
TA = +25°C
TA = 0° to +70°C
Input Offset Current (VCM = 0 Note 5)
TA = +25°C
TA = 0° to +70°C
Large Signal Voltage Gain (VO =
±10
V, RL = 2.0 k)
TA = +25°C
TA = Tlow to Thigh
Output Voltage Swing
RL = 2.0 k, TA = +25°C
RL = 10 k, TA = +25°C
RL = 10 k, TA = Tlow to Thigh
RL = 2.0 k, TA = +25°C
RL = 10 k, TA = +25°C
RL = 10 k, TA = Tlow to Thigh
Output Short Circuit Current (TA = +25°C)
Input Overdrive = 1.0 V, Output to Ground
Source
Sink
Input Common Mode Voltage Range
TA = +25°C
Common Mode Rejection Ratio (RS
≤
10 k, TA = +25°C)
Power Supply Rejection Ratio (RS = 100
Ω,
TA = 25°C)
Power Supply Current
Single
TA = +25°C
TA = Tlow to Thigh
Dual
TA = +25°C
TA = Tlow to Thigh
Quad
TA = +25°C
TA = Tlow to Thigh
Symbol
VIO
—
—
—
—
—
—
∆V
IO/∆T
IIB
—
—
IIO
—
—
AVOL
25
15
VOH
13.2
13.4
13.4
VOL
—
—
—
13.7
13.9
—
–14.1
–14.7
—
—
—
—
–13.5
–14.1
–14.0
mA
20
20
VICR
CMRR
PSRR
ID
—
—
—
—
—
—
2.5
—
4.9
—
9.7
—
3.4
4.2
6.0
7.5
11
13
70
70
31
28
(VEE +4.0) to
(VCC – 2.0)
90
86
—
—
—
—
V
dB
dB
mA
80
—
—
—
V
0.02
—
0.1
2.0
nA
V/mV
0.06
—
0.2
4.0
nA
—
0.5
—
1.0
—
6.0
—
10
2.0
4.0
3.0
5.0
12
14
—
µV/°C
Min
Typ
Max
Unit
mV
ISC
NOTES:
(continued)
3. Tlow = 0°C for MC34080B
Thigh = +70°C for MC34080B
0°C for
MC34081B
+70°C for
MC34081B
0°C for
MC34084
+70°C for
MC34084
0°C for
MC34085
+70°C for
MC34085
4. See application information for typical changes in input offset voltage due to solderability and temperature cycling.
5. Limits at TA = +25°C are guaranteed by high temperature (Thigh) testing.
MOTOROLA ANALOG IC DEVICE DATA
3
MC34080 thru MC34085
AC ELECTRICAL CHARACTERISTICS
(VCC = +15 V, VEE = – 15 V, TA = +25°C, unless otherwise noted.)
Characteristics
Slew Rate (Vin = –10 V to +10 V, RL = 2.0 kΩ, CL = 100 pF)
Compensated
AV = +1.0
AV = –1.0
Decompensated AV = +2.0
AV = –1.0
Settling Time (10 V Step, AV = –1.0)
To 0.10% (±1/2 LSB of 9–Bits)
To 0.01% (±1/2 LSB of 12–Bits)
Gain Bandwidth Product (f = 200 kHz)
Compensated
Decompensated
Power Bandwidth (RL = 2.0 k, VO = 20 Vpp, THD = 5.0%)
Compensated AV = +1.0
Decompensated AV = – 1.0
Phase Margin (Compensated)
RL = 2.0 k
RL = 2.0 k, CL = 100 pF
Gain Margin (Compensated)
RL = 2.0 k
RL = 2.0 k, CL = 100 pF
Equivalent Input Noise Voltage
RS = 100
Ω,
f = 1.0 kHz
Equivalent Input Noise Current (f = 1.0 kHz)
Input Capacitance
Input Resistance
Total Harmonic Distortion
AV = +10, RL = 2.0 k, 2.0
≤
VO
≤
20 Vpp, f = 10 kHz
Channel Separation (f = 10 kHz)
Open Loop Output Impedance (f = 1.0 MHz)
Symbol
SR
20
—
35
—
ts
—
—
GBW
6.0
12
BWp
—
—
φ
m
—
—
Am
—
—
en
In
Ci
ri
THD
—
Zo
—
—
—
—
—
—
—
7.6
4.5
30
0.01
5.0
1012
0.05
120
35
—
—
—
—
—
—
—
—
—
nV/
√
Hz
pA/
√
Hz
pF
Ω
%
dB
Ω
55
39
—
—
400
800
—
—
De-
grees
dB
8.0
16
—
—
kHz
0.72
1.6
—
—
MHz
25
30
50
50
—
—
—
—
µs
Min
Typ
Max
Unit
V/µs
VICR , INPUT COMMON MODE VOLTAGE RANGE (V)
Figure 1. Input Common Mode Voltage Range
versus Temperature
0
VCC/VEE =
±3.0
V to
±22
V
∆V
IO = 5.0 mA
100 k
VCC
IIB , INPUT BIAS CURRENT (pA)
10 k
1.0 k
100
10
1.0
–55
Figure 2. Input Bias Current
versus Temperature
VCC/VEE =
±15
V
VCM = 0 V
–1.0
3.0
2.0
1.0
VEE
0
–55
–25
0
25
50
75
100
125
–25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
4
MOTOROLA ANALOG IC DEVICE DATA
MC34080 thru MC34085
Figure 3. Input Bias Current versus
Input Common Mode Voltage
140
I IB , INPUT BIAS CURRENT (pA)
120
100
80
60
40
20
–12
VO, OUTPUT VOLTAGE SWING (Vpp )
VCC/VEE =
±15
V
TA = 25°C
50
40
RL Connected to Ground
TA = 25°C
Figure 4. Output Voltage Swing
versus Supply Voltage
30
RL = 10 k
20
10
0
RL = 2.0 k
–8.0
–4.0
0
4.0
8.0
VIC, INPUT COMMON MODE VOLTAGE (V)
12
0
±5.0
±10
±15
±20
VCC |VEE|, SUPPLY VOLTAGE (V)
±25
Figure 5. Output Saturation versus
Load Current
V sat , OUTPUT SATURATION VOLTAGE (V)
V sat , OUTPUT SATURATION VOLTAGE (V)
0
VCC
–1.0
–2.0
–3.0
1.0
0
Sink
VEE
0
4.0
8.0
IL, LOAD CURRENT (±mA)
12
16
VCC/VEE = +15 V to +22 V
TA = 25°C
Source
0
Figure 6. Output Saturation vesus
Load Resistance to Ground
VCC
–2.0
–4.0
2.0
1.0
VEE
0
300
3.0 k
30 k
300 k
VCC/VEE =
±15
V
TA = 25°C
RL, LOAD RESISTANCE TO GROUND (Ω)
Figure 7. Output Saturation versus
Load Resistance to VCC
I SC , OUTPUT SHORT CIRCUIT CURRENT (mA)
V sat , OUTPUT SATURATION VOLTAGE (V)
0
VCC
40
Figure 8. Output Short Circuit Current
versus Temperature
–0.4
30
Sink
20
Source
–0.8
2.0
1.0
VEE
0
300
3.0 k
30 k
300 k
VCC/VEE = +15 V
RL to VCC
TA = 25°C
10
VCC/VEE =
±15
V
RL
≤
0.1
Ω
∆V
in = 1.0 V
–25
0
25
50
75
100
125
0
–55
RL, LOAD RESISTANCE TO VCC (Ω)
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
5
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