Features
•
•
•
•
•
•
•
No external components except PIN diode
Supply-voltage range: 2.7 V to 5.5 V
Automatic sensitivity adaptation (AGC)
Automatic strong signal adaptation (ATC)
Automatic supply voltage adaptation
Enhanced immunity against ambient light disturbances
Available for carrier frequencies between 30 kHz to 76 kHz; adjusted by zener-diode
fusing
±
2.5%
•
TTL and CMOS compatible
Applications
•
Audio video applications
•
Home appliances
•
Remote control equipment
Low-Voltage IR
Receiver ASSP
T2526
Description
The IC T2526 is a complete IR receiver for data communication developed and opti-
mised for use in carrier frequency modulated transmission applications. It’s function
can be described using the block diagram of figure 1. The input stage meets two main
functions. First it provides a suitable bias voltage for the PIN diode. Secondly the
pulsed photo-current signals are transformed into a voltage by a special circuit which
is optimised for low noise application. After amplification by a
controlled gain amplifier
(CGA) the signals have to pass a tuned integrated narrow bandpass filter with a center
frequency f
0
which is equivalent to the choosen carrier frequency of the input signal
The demodulator is used first to convert the input burst signal to a digital envelope out-
put pulse and to evaluate the signal information quality, i.e. unwanted pulses will be
suppressed at the output pin. All this is done by means of an integrated dynamic feed-
back circuit which varies the gain as a function of the present enviromental conditions
(ambient light, modulated lamps etc.). Other special features are used to adapt to the
current application to secure best transmission quality. The T2526 operates in a sup-
ply-voltage range from 2.7 V to 5.5 V. By default, the T2526 is optimised for best
performance within 2.7 V to 3.3 V.
Block Diagram
Figure 1.
VS
IN
Input
CGA
& filter
Demo-
dulator
OUT
µC
Oscillator
Carrier frequency f
0
AGC / ATC
& digital control
T2526
Modulated IR signal
min 6 or 10 pulses
GND
Rev. A4, 13-Nov-01
Preliminary Information
1 (14)
Preliminary Information
Ordering Information
Delivery: unsawn wafers (DDW) in box, SO8 (150 mil) and TSSOP8 (3 mm body).
Extended Type
Number
T2526N0xx
1)
-yyy
5)
T2526N1xx
1)
-DDW
T2526N2xx
1)
-yyy
5
T2526N3xx
1)
-DDW
T2526N6xx
1)
-yyy
5
T2526N7xx
1)
-DDW
Notes:
1.
2.
3.
4.
5.
PL
2)
2
1
2
1
2
1
R
PU3)
30
30
40
40
30
30
D
4)
2179
2179
1404
1404
3415
3415
Type
Standard type:
≥10
pulses, enhanced sensibility, high data rate
Lamp type:
≥10
pulses, enhanced suppression of disturbances, secure
data transmission
Short burst type:
≥6
pulses, enhanced data rate
xx means the used carrier frequency value f
0
30, 33, 36, 38, 40, 44 or 56 kHz.(76 kHz type on request)
Two pad layout versions (see figures 2 and 3) available for different assembly demand
Integrated pull-up resistor at PIN OUT (see electrical characteristics)
Typical data transmission rate up to bit/s with f
0
= 56 kHz, V
S
= 5 V (see figure 10)
yyy means kind of packaging:
.................... .......DDW -> unsawn wafers in box
.................... .......TAS -> SO8 in stick
.................... .......TAQ -> SO8 taped and reeled
.................... .......6AQ -> (on request, not standard; TSSOP8 taped 1and reeled)
Samples in SO8 package are available as T2526N038, T2526N238 and T2526N638.
Pad Layout
Figure 2.
Pad layout 1 (DDW only)
GND
IN
OUT
T2526
VS
FUSING
Figure 3.
Pad layout 2 (DDW, SO8 or TSSOP8)
(6)
(1)
VS
T2526
GND
(5)
IN
(3) OUT
FUSING
2 (14)
T2526
Rev. A4, 13-Nov-01
T2526
Pin Configuration
Figure 4.
Pinning SO8 and TSSOP8
VS
n.c.
OUT
n.c.
1
2
3
4
8
7
6
5
n.c.
n.c.
GND
IN
Pin Description
Pin
1
2
3
4
5
6
7
8
Symbol
VS
n.c.
OUT
n.c.
IN
GND
n.c.
n.c.
Supply voltage
Not connected
Data output
Not connected
Input PIN-diode
Ground
Not connected
Not connected
Function
Absolute Maximum Ratings
Parameter
Supply voltage
Supply current
Input voltage
Input DC current at V
S
= 5 V
Output voltage
Output current
Operating temperature
Storage temperature
Power dissipation at T
amb
= 25°C
Symbol
V
S
I
S
V
IN
I
IN
V
O
I
O
T
amb
T
stg
P
tot
Value
-0.3 to 6
3
-0.3 to V
S
0.75
-0.3 to V
S
10
-25 to +85
-40 to +125
30
Unit
V
mA
V
mA
V
mA
°C
°C
mW
Thermal Resistance
Parameter
Junction ambient SO8
Junction ambient TSSOP8
Symbol
R
thJA
R
thJA
Value
130
tbd
Unit
k/W
K/W
Preliminary Information
Rev. A4, 13-Nov-01
3 (14)
Preliminary Information
Electrical Characteristics 3-V Operation
T
amb
= -25 to 85°C, V
S
= 2.7 to 3.3
V unless otherwise specified.
No.
1
1.1
1.2
2
2.1
2.2
2.3
2.4
3
3.1
3.2
3.3
Parameters
Supply
Supply-voltage range
Supply current
Output
Internal pull-up
resistor
1)
Output voltage low
Output voltage high
Output current
clamping
Input
Input DC current
Input DC current; see
figure 7
Min. detection
threshold current; see
figure 5
Min. detection
threshold current with
AC current
disturbance
IIN_AC100 = 3
µA
at
100 Hz
V
IN
= 0; see figure 14
V
IN
= 0; Vs = 3 V,
T
amb
= 25°C
Test signal:
see figure 13
V
S
= 3V,
T
amb
= 25°C,
I
IN_DC
=1µA;
square pp,
burst N=16,
f=f
0
; t
PER
= 10 ms,
fig. 12;
BER = 50
2)
Test signal:
see figure 13
V
S
= 3 V, T
amb
= 25°C,
I
IN_DC
= 1µA;
square pp,
burst N = 16,
f = f
0
; t
PER
= 10 ms,
fig. 12; BER=5%
2)
5
5
3
I
IN_DCMAX
I
IN_DCMAX
I
Eemin
-150
-350
-700
µA
µA
pA
C
B
B
R
2
= 0; see figure 14
T
amb
= 25°C;
see figure 14
R
2
= 2.4 kΩ;
see figure 14
1, 3
3, 6
3, 1
3, 6
R
PU
V
OL
V
OH
I
OCL
V
S
-
0.25
8
30/40
250
Vs
kΩ
mV
V
mA
A
B
B
B
I
IN
=0
1
1
V
S
I
S
2.7
0.7
3.0
0.9
3.3
1.2
V
mA
C
B
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
3.4
3
I
Eemin
-1500
pA
C
3.5
Max. detection
threshold current with
V
IN
> 0V
3
I
Eemax
-200
µA
D
4
4.1
4.2
Controlled Amplifier and Filter
Max. value of variable
gain (CGA)
Min. value of variable
gain (CGA)
G
VARMAX
G
VARMIN
51
-5
dB
dB
D
D
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Depending on version, see “Ordering Information”
2. BER = bit error rate; e.g. BER = 5% means that with P = 20 at the input pin 19...21 pulses can appear at the Pin OUT
3. After transformation of input current into voltage
4 (14)
T2526
Rev. A4, 13-Nov-01
T2526
Electrical Characteristics 3-V Operation
T
amb
= -25 to 85°C, V
S
= 2.7 to 3.3
V unless otherwise specified.
No.
4.3
4.4
Parameters
Total internal
amplification
3)
Center frequency
fusing accuracy of
bandpass
Overall accuracy
center frequency of
bandpass
Overall accuracy
center frequency of
bandpass
BPF bandwidth
T
amb
= 0 to 70°C
-3dB; f
0
= 38 kHz;
see figure 11
B
3.8
kHz
C
V
S
= 3
V,
T
amb
= 25°C
f
03V
-5.5
f
0
+3.5
%
C
Test Conditions
Pin
Symbol
G
MAX
f
03V_FUSE
-2.5
Min.
Typ.
71
f
0
+2.5
Max.
Unit
dB
%
Type*
D
A
4.5
4.6
f
03V
-4.5
f
0
+3.0
%
C
4.7
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Depending on version, see “Ordering Information”
2. BER = bit error rate; e.g. BER = 5% means that with P = 20 at the input pin 19...21 pulses can appear at the Pin OUT
3. After transformation of input current into voltage
Electrical Characteristics 5-V Operation
T
amb
= -25 to 85°C, V
S
= 2.7 to 3.3
V unless otherwise specified.
No.
5
5.1
5.2
6
6.1
6.2
6.3
6.4
7
7.1
7.2
Parameters
Supply
Supply-voltage range
Supply current
Output
Internal pull-up
resistor
1)
Output voltage low
Output voltage high
Output current
clamping
Input
Input DC current
Input DC-current; see
figure 8
V
IN
= 0; see figure 14
V
IN
= 0; Vs = 5 V,
T
amb
= 25°C
5
5
I
IN_DCMAX
I
IN_DCMAX
-400
-700
µA
µA
C
B
R
2
= 0; see figure 14
T
amb
= 25°C;
see figure 14
R
2
= 2.4 kΩ;
see figure 14
1,3
3,6
3,1
3,6
R
PU
V
OL
V
OH
I
OCL
V
S
-
0.25
8
30/40
250
Vs
kΩ
mV
V
mA
A
B
B
B
I
IN
=0
1
1
V
S
I
S
4.5
0.9
5.0
1.2
5.5
1.5
V
mA
C
B
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes:
1. Depending on version, see “Ordering Information”
2. BER = bit error rate; e.g. BER = 5% means that with P = 20 at the input pin 19...21 pulses can appear at the Pin OUT
3. After transformation of input current into voltage
Preliminary Information
Rev. A4, 13-Nov-01
5 (14)
stm32/stm8
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