54HSC74CBBAF datasheet, PDF - EEWORLD Datasheet

54HSC74CBBAF: DescriptionD Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, CDIP14,; Categorylogic logic; File Size4MB，100 Pages; ManufacturerPlessey Semiconductors Ltd.

Download Datasheet Parametric View All

54HSC74CBBAF Overview

D Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, CDIP14,

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Plessey Semiconductors Ltd.
package instruction	DIP, DIP14,.3
Reach Compliance Code	unknown
JESD-30 code	R-XDIP-T14
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	D FLIP-FLOP
MaximumI(ol)	0.009 A
Number of functions	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Prop。Delay @ Nom-Sup	25 ns
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
Base Number Matches	1

Damped Input Filter Series 1: Switching regulators are often preferred over linear regulators because they are more efficient, and switching topologies rely heavily on input filtering. This circuit element, combined with the typic...; inoint98 Power technology

Please help, we want to make a device that supports MTP (using USB); however, Windows can only recognize it as PTP. Please help me analyze it.: After the device is plugged in, the device manager shows "still image camera" instead of the "portable media player" we need, which can directly synchronize media files with MS media player (version 1...; wyongyongge Embedded System

Debugging FPGAs with the SignalTap II Logic Analyzer: Abstract: This paper introduces the use of SignalTap II embedded logic analyzer in Quartus II, a programmable logic device development tool, and gives a specific design example, detailing the specific...; 程序天使 FPGA/CPLD

Siemens Communications' fixed network, mobile network and operator service departments have been merged into Nokia. Where will the enterprise network go?: Siemens today officially announced that the fixed network, mobile network and operator service departments of the communications group will be merged into Nokia, thus confirming the rumors that the co...; 1234 RF/Wirelessly

MSP430F149 Timer A capture function to measure pulse width. Can anyone help me find out what went wrong? The program is as follows: [code]/****Measure pulse width and display it with 1602****/ #include #include "cry1602.c" #define uint unsigned int #define uchar unsigned char uint pwm_star,pwm_end; uint width; uint i=0; uchar *s="...; qignsi2015 Microcontroller MCU

PCB process comparison: tin spraying vs gold plating vs immersion gold: [align=left][color=rgb(62, 62, 62)]Today, I will talk to you about the difference between immersion gold and gold plating of PCB circuit boards. Immersion gold and gold plating are processes commonly ...; ohahaha PCB Design

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components