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74LVC1G38GV-Q100

Description
IC LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5, PLASTIC, SC-74A, SOT-753, 5 PIN, Gate
Categorylogic    logic   
File Size130KB,13 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

74LVC1G38GV-Q100 Overview

IC LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5, PLASTIC, SC-74A, SOT-753, 5 PIN, Gate

74LVC1G38GV-Q100 Parametric

Parameter NameAttribute value
MakerNXP
Parts packaging codeSC-74A
package instructionTSSOP,
Contacts5
Manufacturer packaging codeSOT753
Reach Compliance Codeunknown
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G5
length2.9 mm
Logic integrated circuit typeNAND GATE
Number of functions1
Number of entries2
Number of terminals5
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristicsOPEN-DRAIN
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)12.5 ns
Filter levelAEC-Q100
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
width1.5 mm
74LVC1G38-Q100
2-input NAND gate; open drain
Rev. 1 — 27 November 2013
Product data sheet
1. General description
The 74LVC1G38-Q100 provides a 2-input NAND function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device as translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V).
24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Open drain outputs
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options

74LVC1G38GV-Q100 Related Products

74LVC1G38GV-Q100 74LVC1G38GW-Q100
Description IC LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5, PLASTIC, SC-74A, SOT-753, 5 PIN, Gate IC LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5, Gate
Maker NXP NXP
Parts packaging code SC-74A TSSOT
package instruction TSSOP, TSSOP,
Contacts 5 5
Reach Compliance Code unknown unknown
series LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G5 R-PDSO-G5
length 2.9 mm 2.05 mm
Logic integrated circuit type NAND GATE NAND GATE
Number of functions 1 1
Number of entries 2 2
Number of terminals 5 5
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics OPEN-DRAIN OPEN-DRAIN
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd) 12.5 ns 12.5 ns
Filter level AEC-Q100 AEC-Q100
Maximum seat height 1.1 mm 1.1 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 1.65 V 1.65 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE
Terminal form GULL WING GULL WING
Terminal pitch 0.95 mm 0.65 mm
Terminal location DUAL DUAL
width 1.5 mm 1.25 mm
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