ACT-S128K32 High Speed
4 Megabit SRAM Multichip Module
Features
■
4 Low Power CMOS 128K x 8 SRAMs in one MCM
■
Overall configuration as 128K x 32
■
Input and Output TTL Compatible
■
17, 20, 25, 35, 45 & 55ns Access Times, 15ns Available by Special Order
■
Full Military (-55°C to +125°C) Temperature Range
■
+5V Power Supply
■
Choice of 7 Hermetically sealed Co-fired Packages:
●
68–Lead, Low Profile CQFP (F1), 1.56"SQ x .140"max
●
68–Lead, Dual-Cavity CQFP (F2), .88"SQ x .20"max (.18"max thickness
available, contact factory for details)
(Drops into the 68 Lead JEDEC .99"SQ
CQFJ footprint)
●
68–Lead, Single-Cavity CQFP (F18), .94"SQ x .140"max
(Drops into the 68
Lead JEDEC .99"SQ CQFJ footprint)
●
66–Lead, PGA-Type (P2,P6 with/without shoulders), 1.185"SQ x .245"max
●
66–Lead, PGA-Type (P7,P3 with/without shoulders), 1.08"SQ x .160"max
■
Internal Decoupling Capacitors
■
DESC SMD# 5962–93187 Released (P2,P3,P6,P7)
CIRCUIT TECHNOLOGY
www.aeroflex.com
General Description
The ACT–S128K32 is a High
Speed 4 megabit CMOS SRAM
Multichip
Module
(MCM)
designed for full temperature
range, military, space, or high
reliability mass memory and
fast cache applications.
The MCM can be organized
as a 128K x 32 bits, 256K x 16
bits or 512k x 8 bits device and
is input and output TTL
compatible. Writing is executed
when the write enable (WE)
and chip enable (CE) inputs are
low. Reading is accomplished
when WE is high and CE and
output enable (OE) are both
low. Access time grades of
17ns, 20ns, 25ns, 35ns, 45ns
and 55ns maximum are
standard.
The +5 Volt power supply
version is standard and the
+3.3 Volt low power model is
available (See ACT-S128K32V
data sheet).
The products are designed for
operation over the temperature
range of -55°C to +125°C and
screened under the full military
environment. DESC Standard
Military Drawing (SMD) part
numbers are released and
available.
The
ACT-S128K32
is
manufactured in Aeroflex’s
80,000ft
2
MIL-PRF-38534
certified facility in Plainview,
N.Y.
5962–95595 Released (F1,F2,F18)
Block Diagram – PGA Type Package(P2,P7) & CQFP(F2,F18)
Pin Description
WE
1
CE
1
WE
2
CE
2
WE
3
CE
3
WE
4
CE
4
I/O
0-31
A
0
– A
16
OE
128Kx8
128Kx8
128Kx8
128Kx8
A
0–16
WE
1–4
CE
1–4
OE
V
cc
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
GND
NC
Data I/O
Address Inputs
Write Enables
Chip Enables
Output Enable
Power Supply
Ground
Not Connected
Block Diagram – CQFP(F1)
Pin Description
CE
1
WE
OE
A
0
– A
16
128Kx8
128Kx8
128Kx8
128Kx8
CE
2
CE
3
CE
4
I/O
0-31
A
0–16
WE
CE
1–4
OE
V
cc
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
GND
NC
Data I/O
Address Inputs
Write Enable
Chip Enables
Output Enable
Power Supply
Ground
Not Connected
eroflex Circuit Technology - Advanced Multichip Modules © SCD1659 REV E 5/21/01
Absolute Maximum Ratings
Symbol
T
C
T
STG
P
D
Storage Temperature
Maximum Package Power Dissipation
F1, P2/P6, P3/P7 Packages
F2,F18 Package
Ø
J-C
Hottest Die, Max Thermal Resistance - Junction to Case
F1, P2/P6, P3/P7 Packages
F2,F18 Package
V
G
T
L
Maximum Signal Voltage to Ground
Maximum Lead Temperature (10 seconds)
2.0
8.0
-0.5 to +7
300
°C/W
°C/W
V
°C
4.4
3.3
W
W
Rating
Case Operating Temperature
Range
-55 to +125
-65 to +150
Units
°C
°C
Normal Operating Conditions
Symbol
V
CC
V
IH
V
IL
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Minimum
+4.5
+2.2
-0.5
Maximum
+5.5
V
CC
+ 0.3
+0.8
Units
V
V
V
A
Truth Table
Mode
Standby
Read
Read
Write
CE
H
L
L
L
OE
X
L
H
X
WE
X
H
H
L
Data I/O
High Z
Data Out
High Z
Data In
Power
Standby (deselect/power down)
Active
Active (deselected)
Active
Capacitance
(
f = 1MHz, T
C
= 25°C
)
Symbol Parameter
C
AD
C
OE
C
WE
C
CE
C
I
/
O
A
0
–
A
16
Capacitance
OE Capacitance
CQFP(F1) Package
PGA(P2,P3,P6,P7) and CQFP(F2,F18) Packages
Chip Enable Capacitance
I/O
0
– I/O
31
Capacitance
Maximum
50
50
50
20
20
20
Units
pF
pF
pF
pF
pF
pF
Capacitance is guaranteed by design but not tested.
(4.5Vdc< V
CC
< 5.5Vdc, V
SS
= 0V, T
C
= -55°C to +125°C, Unless otherwise specified)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current 32 Bit
Mode
Aeroflex Circuit Technology ACT-S128K32
DC Characteristics
Conditions
Sym
I
LI
I
LO
–017 & –020 –025 & –035 –045 & –055
Units
Min Max
Min Max
Min Max
10
10
10
10
10
10
µA
µA
V
CC
= Max,
V
IN
= 0 or V
CC
CE = V
IH
, OE = V
IH
,
V
OUT
= 0 or V
CC
CE = V
IL
, OE = V
IH
,
I
CC
x32 f = 5 MHz, V
CC
= Max,
CMOS Compatible
2
600
600
600
mA
SCD1659 REV E 5/21/01 Plainview NY (516) 694-6700
(4.5Vdc< V
CC
< 5.5Vdc, V
SS
= 0V, T
C
= -55°C to +125°C, Unless otherwise specified)
Parameter
Sym
Conditions
CE = V
IH
, OE = V
IH
,
f = 5 MHz, V
CC
= Max,
CMOS Compatible
I
OL
= 8 mA, V
CC
= Min
I
OH
= -4.0 mA, V
CC
= Min
2.4
–017 & –020 –025 & –035 –045 & –055
Units
Min Max
Min Max
Min Max
80
0.4
2.4
60
0.4
2.4
60
0.4
mA
V
V
DC Characteristics (Continued)
Standby Current
Output Low Voltage
Output High Voltage
I
SB
V
OL
V
OH
(V
CC
= 5.0V, V
SS
= 0V, T
C
= -55°C to +125°C)
Read Cycle
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from Address Change
Output Enable to Output Valid
Chip Enable to Output in Low Z*
Output Enable to Output in Low Z*
Chip Deselect to Output in High Z*
Output Disable to Output in High Z*
* Parameters guaranteed by design but not tested
AC Characteristics
Sym
t
RC
t
AA
t
ACE
t
OH
t
OE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
–020
–017
Min Max Min Max
17
17
17
0
9
3
0
12
10
3
0
12
11
0
12
20
20
20
–025
–035
Min Max Min Max
25
25
25
0
15
3
0
12
12
3
0
15
15
0
20
35
35
35
–045
–055
Min Max Min Max
45
45
45
0
25
3
0
20
20
3
0
20
20
0
30
55
55
55
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
A
Write Cycle
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Output Active from End of Write *
Write to Output in High Z *
Data Hold from Write Time
Address Hold Time
* Parameters guaranteed by design but not tested
Sym
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
OW
t
WHZ
t
DH
t
AH
–017
Min Max
17
12
12
10
13
0
3
10
0
0
–020
–025
–035
–045
–055
Min Max Min Max Min Max Min Max Min Max
20
15
15
12
15
0
3
10
0
0
0
0
25
20
20
15
20
0
3
10
0
0
35
25
25
18
25
0
4
15
0
0
45
30
30
20
30
0
4
15
0
0
55
40
40
20
40
0
4
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Retention Electrical Characteristics (Special Order Only)
(T
C
= -55°C to +125°C)
Parameter
V
CC
for Data Retention
Data Retention Current
Sym
V
DR
I
CCDR1
Test Conditions
CE
≥
V
CC
– 0.2V
V
CC
= 3V, 17-55ns
All Speeds
Min
Max
2
5.5
11.6
Units
V
mA
Aeroflex Circuit Technology ACT-S128K32
3
SCD1659 REV E 5/21/01 Plainview NY (516) 694-6700
Timing Diagrams
Read Cycle Timing Diagrams
Read Cycle 1 (CE = OE = V
IL
, WE = V
IH
)
t
RC
A
0-16
t
AA
t
OH
D
I/O
Previous Data Valid
Data Valid
CE
t
AS
WE
S
EE
N
OTE
Write Cycle Timing Diagrams
Write Cycle 1 (WE Controlled, OE = V
IL
)
t
WC
A
0-16
t
AW
t
CW
t
AH
t
WP
S
EE
N
OTE
t
OW
t
WHZ
t
DW
Data Valid
t
DH
D
I/O
A
Read Cycle 2 (WE = V
IH
)
t
RC
A
0-16
t
AA
CE
t
ACE
t
CLZ
S
EE
N
OTE
Write Cycle 2 (CE Controlled, OE = V
IH
)
t
WC
A
0-16
t
AW
t
CHZ
S
EE
N
OTE
t
AH
t
CW
t
AS
CE
OE
t
WP
t
OE
t
OLZ
S
EE
N
OTE
t
OHZ
S
EE
N
OTE
WE
t
DW
D
I/O
Data Valid
t
DH
D
I/O
High Z
Data Valid
UNDEFINED
DON’T CARE
Note: Guaranteed by design, but not tested.
Note: Guaranteed by design, but not tested.
AC Test Circuit
Current Source
I
OL
To Device Under Test
C
L
=
50 pF
I
OH
Current Source
V
Z
~ 1.5 V (Bipolar Supply)
Parameter
Input Pulse Level
Input Rise and Fall
Input and Output Timing Reference Level
Output Lead Capacitance
Typical
0 – 3.0
5
1.5
50
Units
V
ns
V
pF
Notes:
1) V
Z
is programmable from -2V to +7V. 2) I
OL
and I
OH
programmable from 0 to 16 mA. 3) Tester Impedance
Z
O
= 75Ω.
4)
V
Z
is typically the midpoint of V
OH
and V
OL
. 5) I
OL
and I
OH
are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit Technology ACT-S128K32
4
SCD1659 REV E 5/21/01 Plainview NY (516) 694-6700
Pin Numbers & Functions
66 Pins — PGA-Type
Pin # Function Pin # Function Pin # Function Pin # Function Pin # Function Pin # Function Pin # Function
1
2
3
4
5
6
7
8
9
10
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
NC
I/O
0
I/O
1
11
12
13
14
15
16
17
18
19
20
I/O
2
WE
2
CE
2
GND
I/O
11
A
10
A
11
A
12
Vcc
CE
1
21
22
23
24
25
26
27
28
29
30
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
31
32
33
34
35
36
37
38
39
40
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
41
42
43
44
45
46
47
48
49
50
A
9
I/O
16
I/O
17
I/O
18
V
CC
CE
4
WE
4
I/O
27
A
3
A
4
51
52
53
54
55
56
57
58
59
60
A
5
WE
3
CE
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
0
61
62
63
64
65
66
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
Note:
Pins 8, 21, 28, & 39 normally not connected, and can be connected to ground by specifing pinout Option "C".
"P2" — 1.185" SQ PGA Type Package Standard (with shoulders on Pins 1, 11, 56 & 66)
"P6" — 1.185" SQ PGA Type Special Order Package (without shoulders
)
Side View
(P2)
.245
MAX
.025
.035
.085
.075
A
Side View
(P6)
.061
.051
Bottom View (P2 & P6)
1.185 SQ
±.015
1.000
.600
Pin 56
Pin 1
φ
.050
1.140
1.150
.100
1.140
1.150
Use
Limited Availability
.100
''P7'' package for new designs
φ
.020
.016
Pin 66
1.000
φ
.020
.016
.180
TYP
Pin 11
.155
.145
.160
MAX
.180
TYP
.100
"P7" — 1.08" SQ PGA Type Package Standard (with shoulders on Pins 1, 11, 56 & 66)
"P3" — 1.08" SQ PGA Type Special Order Package (without shoulders
)
Side View
(P7)
Side View
(P3)
.085
.075
Bottom View (P7 & P3)
1.085 SQ
MAX
1.000
.600
Pin 56
.185
MAX
.025
.035
.061
.051
Pin 1
φ
.050
1.030
1.040
.100
1.030
1.040
.100
1.000
φ
.020
.016
.180
TYP
φ
.020
.016
Pin 66
Pin 11
.155
.145
.160
MAX
.180
TYP
5
.100
Aeroflex Circuit Technology ACT-S128K32
SCD1659 REV E 5/21/01 Plainview NY (516) 694-6700
Embedded System
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