PA7040C-2 datasheet, PDF - EEWORLD Datasheet

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PA7040C-2: DescriptionField Programmable Gate Array, 33.3MHz, CMOS, CDIP40,; CategoryProgrammable logic devices Programmable logic; File Size600KB，8 Pages; ManufacturerAMI Semiconductor

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PA7040C-2 Overview

Field Programmable Gate Array, 33.3MHz, CMOS, CDIP40,

PA7040C-2 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMI Semiconductor
Reach Compliance Code	unknown
maximum clock frequency	33.3 MHz
JESD-30 code	R-XDIP-T40
JESD-609 code	e0
Number of entries	38
Output times	24
Number of terminals	40
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Base Number Matches	1

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PA7040C-2 Related Products

	PA7040C-2	PA7040P-2	PA7040J-2	PA7040C-1	PA7040P-1	PA7040J-1
Description	Field Programmable Gate Array, 33.3MHz, CMOS, CDIP40,	Field Programmable Gate Array, 33.3MHz, CMOS, PDIP40,	Field Programmable Gate Array, 33.3MHz, CMOS, PQCC44,	Field Programmable Gate Array, 41.6MHz, CMOS, CDIP40,	Field Programmable Gate Array, 41.6MHz, CMOS, PDIP40,	Field Programmable Gate Array, 41.6MHz, CMOS, PQCC44,
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	AMI Semiconductor	AMI Semiconductor	AMI Semiconductor	AMI Semiconductor	AMI Semiconductor	AMI Semiconductor
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
maximum clock frequency	33.3 MHz	33.3 MHz	33.3 MHz	41.6 MHz	41.6 MHz	41.6 MHz
JESD-30 code	R-XDIP-T40	R-PDIP-T40	S-PQCC-J44	R-XDIP-T40	R-PDIP-T40	S-PQCC-J44
JESD-609 code	e0	e0	e0	e0	e0	e0
Number of entries	38	38	38	38	38	38
Output times	24	24	24	24	24	24
Number of terminals	40	40	44	40	40	44
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Package body material	CERAMIC	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	DIP	QCCJ	DIP	DIP	QCCJ
Encapsulate equivalent code	DIP40,.6	DIP40,.6	LDCC44,.7SQ	DIP40,.6	DIP40,.6	LDCC44,.7SQ
Package shape	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE
Package form	IN-LINE	IN-LINE	CHIP CARRIER	IN-LINE	IN-LINE	CHIP CARRIER
power supply	5 V	5 V	5 V	5 V	5 V	5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	YES	NO	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	THROUGH-HOLE	J BEND	THROUGH-HOLE	THROUGH-HOLE	J BEND
Terminal pitch	2.54 mm	2.54 mm	1.27 mm	2.54 mm	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL	QUAD	DUAL	DUAL	QUAD

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