CD74HC75PWT datasheet, PDF - EEWORLD Datasheet

CD74HC75PWT: DescriptionHigh Speed CMOS Logic Dual 2-Bit Bistable Transparent Latches 16-TSSOP -55 to 125; Categorylogic logic; File Size751KB，20 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latches 16-TSSOP -55 to 125

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	TSSOP
package instruction	TSSOP-16
Contacts	16
Reach Compliance Code	compliant
Factory Lead Time	6 weeks
series	HC/UH
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	5 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	D LATCH
MaximumI(ol)	0.0052 A
Humidity sensitivity level	1
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	2/6 V
Maximum supply current (ICC)	0.04 mA
Prop。Delay @ Nom-Sup	24 ns
propagation delay (tpd)	195 ns
Certification status	Not Qualified
Schmitt trigger	No
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	4.5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	HIGH LEVEL
width	4.4 mm
Base Number Matches	1

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