5962-8956701ZC datasheet, PDF - EEWORLD Datasheet

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5962-8956701ZC: DescriptionFIFO, 2KX9, 120ns, Asynchronous, CMOS,; Categorystorage storage; File Size147KB，19 Pages; ManufacturerTEMIC; Websitehttp://www.temic.de/

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5962-8956701ZC Overview

FIFO, 2KX9, 120ns, Asynchronous, CMOS,

5962-8956701ZC Parametric

Parameter Name	Attribute value
Maker	TEMIC
Reach Compliance Code	unknown
Maximum access time	120 ns
Other features	RETRANSMIT
period time	140 ns
JESD-609 code	e4
length	13.97 mm
memory density	18432 bit
memory width	9
Number of functions	1
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2KX9
Exportable	NO
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	3.048 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
width	11.43 mm
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

DATE

APPROVED

Updated boilerplate to reflect current requirements and made

corrections to table I and waveforms. Separated source bulletin from

the body of the drawing. - glg

01-01-30

Raymond Monnin

THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Kenneth Rice

CHECKED BY

Charles Reusing

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY All DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

APPROVED BY

Monica L. Poelking

MICROCIRCUIT, MEMORY, DIGITAL, CMOS,

2K X 9 FIFO, MONOLITHIC SILICON

DRAWING APPROVAL DATE

27 March 1990

REVISION LEVEL

SIZE

SHEET

CAGE CODE

67268

1 OF

5962-89567

DSCC FORM 2233

APR 97

DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.

5962-E180-01

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the

issue listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto,

cited in the solicitation.

SPECIFICATION

DEPARTMENT OF DEFENSE

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

STANDARDS

DEPARTMENT OF DEFENSE

MIL-STD-883 - Test Method Standard Microcircuits.

MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.

HANDBOOKS

DEPARTMENT OF DEFENSE

MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMD's).

MIL-HDBK-780 - Standard Microcircuit Drawings.

(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization

Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the

text of this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations

unless a specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-

JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer

Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-

38535 may be processed as QML product in accordance with the manufacturer's approved program plan and qualifying activity

approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make

modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A "Q" or "QML"

certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535, appendix A and herein.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Truth table. The truth table shall be as specified on figure 2.

3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection

provided that each coated microcircuit inspection lot (see MIL-PRF-38535, appendix A) shall be subjected to and pass the

Internal Water-Vapor Content test (test method 1018 of MIL-STD-883). The frequency of the internal water vapor testing may

not be decreased unless approved by the preparing activity.

3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are

as specified in table I and shall apply over the full case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are described in table I.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43216-5000

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-89567

SHEET

5962-8956701ZC Related Products

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Description	FIFO, 2KX9, 120ns, Asynchronous, CMOS,	FIFO, 2KX9, 40ns, Asynchronous, CMOS, 0.300 INCH, THIN, CERAMIC, DIP-28	FIFO, 2KX9, 50ns, Asynchronous, CMOS,	FIFO, 2KX9, 65ns, Asynchronous, CMOS, 0.300 INCH, THIN, CERAMIC, DIP-28	FIFO, 2KX9, 65ns, Asynchronous, CMOS,	FIFO, 2KX9, 120ns, Asynchronous, CMOS, CDIP28,	FIFO, 2KX9, 50ns, Asynchronous, CMOS, 0.300 INCH, THIN, CERAMIC, DIP-28	FIFO, 2KX9, 80ns, Asynchronous, CMOS,	FIFO, 2KX9, 80ns, Asynchronous, CMOS, 0.300 INCH, THIN, CERAMIC, DIP-28	FIFO, 2KX9, 40ns, Asynchronous, CMOS,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Maximum access time	120 ns	40 ns	50 ns	65 ns	65 ns	120 ns	50 ns	80 ns	80 ns	40 ns
Other features	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT
period time	140 ns	50 ns	65 ns	80 ns	80 ns	140 ns	65 ns	100 ns	100 ns	50 ns
JESD-609 code	e4	e0	e4	e0	e4	e0	e0	e4	e0	e4
length	13.97 mm	37.1475 mm	13.97 mm	37.1475 mm	13.97 mm	37.1475 mm	37.1475 mm	13.97 mm	37.1475 mm	13.97 mm
memory density	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit
memory width	9	9	9	9	9	9	9	9	9	9
Number of functions	1	1	1	1	1	1	1	1	1	1
word count	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words
character code	2000	2000	2000	2000	2000	2000	2000	2000	2000	2000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
organize	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9
Exportable	NO	NO	NO	NO	NO	NO	NO	NO	NO	NO
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN	DIP	QCCN	DIP	QCCN	DIP	DIP	QCCN	DIP	QCCN
Package form	CHIP CARRIER	IN-LINE	CHIP CARRIER	IN-LINE	CHIP CARRIER	IN-LINE	IN-LINE	CHIP CARRIER	IN-LINE	CHIP CARRIER
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	3.048 mm	5.08 mm	3.048 mm	5.08 mm	3.048 mm	5.08 mm	5.08 mm	3.048 mm	5.08 mm	3.048 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	NO	YES	NO	YES	NO	NO	YES	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	GOLD	TIN LEAD	GOLD	TIN LEAD	GOLD	TIN LEAD	TIN LEAD	GOLD	TIN LEAD	GOLD
Terminal form	NO LEAD	THROUGH-HOLE	NO LEAD	THROUGH-HOLE	NO LEAD	THROUGH-HOLE	THROUGH-HOLE	NO LEAD	THROUGH-HOLE	NO LEAD
Terminal pitch	1.27 mm	2.54 mm	1.27 mm	2.54 mm	1.27 mm	2.54 mm	2.54 mm	1.27 mm	2.54 mm	1.27 mm
Terminal location	QUAD	DUAL	QUAD	DUAL	QUAD	DUAL	DUAL	QUAD	DUAL	QUAD
width	11.43 mm	7.62 mm	11.43 mm	7.62 mm	11.43 mm	7.62 mm	7.62 mm	11.43 mm	7.62 mm	11.43 mm
Maker	TEMIC	-	TEMIC	TEMIC	TEMIC	TEMIC	TEMIC	TEMIC	TEMIC	TEMIC
Base Number Matches	1	1	1	1	1	1	1	1	1	-

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