74LVC2G32GF datasheet, PDF - EEWORLD Datasheet

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74LVC2G32GF: DescriptionLVC/LCX/Z SERIES, DUAL 2-INPUT OR GATE, PDSO8, 1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8; Categorylogic logic; File Size279KB，21 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVC2G32GF Overview

LVC/LCX/Z SERIES, DUAL 2-INPUT OR GATE, PDSO8, 1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8

74LVC2G32GF Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SON
package instruction	1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8
Contacts	8
Reach Compliance Code	unknown
series	LVC/LCX/Z
JESD-30 code	R-PDSO-N8
JESD-609 code	e3
length	1.35 mm
Logic integrated circuit type	OR GATE
Humidity sensitivity level	1
Number of functions	2
Number of entries	2
Number of terminals	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	11 ns
Certification status	Not Qualified
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	TIN
Terminal form	NO LEAD
Terminal pitch	0.35 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	1 mm

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74LVC2G32

Dual 2-input OR gate

Rev. 11 — 8 April 2013

Product data sheet

1. General description

The 74LVC2G32 provides a 2-input OR gate function.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing a damaging backflow current through the device

when it is powered down.

2. Features and benefits



Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant outputs in the Power-down mode

High noise immunity

24

mA output drive (V

= 3.0 V)

CMOS low power consumption

Complies with JEDEC standard:



JESD8-7 (1.65 V to 1.95 V)



JESD8-5 (2.3 V to 2.7 V)



JESD8-B/JESD36 (2.7 V to 3.6 V)

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V

Multiple package options

Specified from

40 C

to +85

C

and

40 C

to +125

C



74LVC2G32GF Related Products

	74LVC2G32GF	74LVC2G32GN	74LVC2G32GS
Description	LVC/LCX/Z SERIES, DUAL 2-INPUT OR GATE, PDSO8, 1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8	LVC/LCX/Z SERIES, DUAL 2-INPUT OR GATE, PDSO8, 1.20 X 1 MM, 0.35 MM HEIGHT, SOT-1116, SON-8	LVC/LCX/Z SERIES, DUAL 2-INPUT OR GATE, PDSO8, 1.35 X 1 MM, 0.35 MM HEIGHT, 0.35 MM PITCH, SOT-1203, SON-8
Is it Rohs certified?	conform to	conform to	conform to
Maker	NXP	NXP	NXP
Parts packaging code	SON	SON	SON
package instruction	1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8	1.20 X 1 MM, 0.35 MM HEIGHT, SOT-1116, SON-8	1.35 X 1 MM, 0.35 MM HEIGHT, 0.35 MM PITCH, SOT-1203, SON-8
Contacts	8	8	8
Reach Compliance Code	unknown	unknown	unknown
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PDSO-N8	R-PDSO-N8	R-PDSO-N8
JESD-609 code	e3	e3	e3
length	1.35 mm	1.2 mm	1.35 mm
Logic integrated circuit type	OR GATE	OR GATE	OR GATE
Humidity sensitivity level	1	1	1
Number of functions	2	2	2
Number of entries	2	2	2
Number of terminals	8	8	8
Maximum operating temperature	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VSON	SON	VSON
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260	260
propagation delay (tpd)	11 ns	11 ns	11 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	0.5 mm	0.35 mm	0.35 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	TIN	TIN	TIN
Terminal form	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	0.35 mm	0.3 mm	0.35 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30
width	1 mm	1 mm	1 mm

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