Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output tolerant
(3-state)
FEATURES
•
5 V tolerant inputs/outputs for interfacing with 5 V logic
•
Wide supply voltage range from 1.2 to 3.6 V
•
CMOS low power consumption
•
MULTIBYTE
TM
flow-through standard pin-out
architecture
•
Low inductance multiple power and ground pins for
minimum noise and ground bounce
•
Direct interface with TTL levels
•
All data inputs have bushold (74LVCH16244A only).
•
Complies with JEDEC standard no. 8-1A
•
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
DESCRIPTION
74LVC16244A;
74LVCH16244A
The 74LVC(H)16244A is a high-performance, low power,
low voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 Volt. These features allow the use of
these devices as a mixed 3.3 and 5 V environment.
The 74LVC(H)16244A is a 16-bit non-inverting buffer/line
driver with 3-state outputs. The device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer. The
3-state outputs are controlled by the output enable inputs
1OE and 2OE. A HIGH on nOE causes the outputs to
assume a high-impedance OFF-state.
The 74LVC(H)16244A is identical to the 74LVC16240A
but has non-inverting outputs.
The 74LVCH16244A bushold data inputs eliminates the
need for external pull-up resistors to hold unused inputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
2.5 ns.
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
Note
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total switching outputs;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
PARAMETER
propagation delay nA
n
to nY
n
input capacitance
power dissipation capacitance per gate
V
I
= GND to V
CC
; note 1
CONDITIONS
C
L
= 50 pF; V
CC
= 3.3 V
TYPICAL
3.0
5.0
25
ns
pF
pF
UNIT
2003 Jan 30
2
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output tolerant
(3-state)
PINNING
SYMBOL
1OE
n.c.
1Y
0
1Y
1
GND
1Y
2
1Y
3
V
CC
2Y
0
2Y
1
2Y
2
2Y
3
3Y
0
3Y
1
3Y
2
3Y
3
4Y
0
4Y
1
4Y
2
4Y
3
4OE
3OE
4A
3
4A
2
4A
1
4A
0
3A
3
3A
2
3A
1
3A
0
2A
3
2A
2
2A
1
2A
0
1A
3
1A
2
1A
1
1A
0
2OE
2003 Jan 30
PINS
1
−
2
3
4, 10, 15, 21, 28, 34, 39, 45
5
6
7, 18, 31, 42
8
9
11
12
13
14
16
17
19
20
22
23
24
25
26
27
29
30
32
33
35
36
37
38
40
41
43
44
46
47
48
BALLS
A1
A2, A3, A4, A5, E3, E4, F3,
F4, K2, K3, K4, K5
B2
B1
C2
C1
C3, H3, C4, H4
D2
D1
E2
E1
F1
F2
G1
G2
H1
H2
J1
J2
K1
K6
J5
J6
H5
H6
G5
G6
F5
F6
D6
E5
D6
D5
C6
C5
B6
B5
A6
4
74LVC16244A;
74LVCH16244A
DESCRIPTION
output enable input (active LOW)
not connected
data output
data output
data output
data output
supply voltage
data output
data output
data output
data output
data output
data output
data output
data output
data output
data output
data output
data output
output enable input (active LOW)
output enable input (active LOW)
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
output enable input (active LOW)
B3, B4, D3, D4, G3, G4, J3, J4 ground (0 V)
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