EEWORLDEEWORLDEEWORLD

Part Number

Search

87280-836HLF

Description
Board Connector, 36 Contact(s), 1 Row(s), Male, Straight, Solder Terminal, LEAD FREE
CategoryThe connector    The connector   
File Size256KB,4 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Environmental Compliance  
Download Datasheet Parametric View All

87280-836HLF Overview

Board Connector, 36 Contact(s), 1 Row(s), Male, Straight, Solder Terminal, LEAD FREE

87280-836HLF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerAmphenol
package instructionLEAD FREE
Reach Compliance Codecompliant
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD (15) OVER NICKEL
Contact completed and terminatedGOLD (15) OVER NICKEL
Contact point genderMALE
Contact materialPHOSPHOR BRONZE
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee4
MIL complianceNO
Manufacturer's serial number87280
Mixed contactsNO
Installation methodSTRAIGHT
Installation typeBOARD
Number of rows loaded1
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typeSOLDER
Total number of contacts36
UL Flammability Code94V-0
Base Number Matches1
PDM: Rev:AH
STATUS:
Released
Printed: Jul 21, 2006
.
[ufun learning] Practical Part 1: "PWM control of DC motor acceleration, deceleration, forward and reverse rotation"
[i=s]This post was last edited by 1nnocet- on 2019-7-23 14:50[/i]《PWM Control of DC Motor Acceleration, Deceleration, Forward and Reverse Rotation》 Since I am quite busy recently, I will give a brief ...
1nnocet- MCU
24G radar complete development solution
I would like to ask if anyone has developed a complete set of 24G radar. Please contact QQ[url=mailto:13380331958@163.com]3[/url]82755418. Thank you!...
qylin Automotive Electronics
How to implement hot swap of sd card
How to implement hot-swappable SD card using fat16 file system....
chap1 Embedded System
Amplitude stabilization circuit
We have not been able to come up with a circuit that can output a stable amplitude. Does anyone know how to do this? Please help....
princess. Electronics Design Contest
A comprehensive analysis of four high-speed storage interfaces. Who can beat SATA on the beach?
Reprinted from [url]http://ee.ofweek.com/2015-12/ART-8110-2809-29035734.html[/url] With faster data transmission speed, smaller space occupation and longer transmission distance, SATA interface succes...
白丁 FPGA/CPLD
How to fix the problem of negative slack in timing constraints
I have already made the constraint in the sdc file create_clock -name {iclk_27M} -period 37.000 -waveform { 0.000 18.500 } [get_ports {iclk_27M}] but its slack is still negative. How can I solve this ...
3008202060 FPGA/CPLD

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2280  1594  400  683  2610  46  33  9  14  53 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号