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74AC14

Description
AC SERIES, HEX 1-INPUT INVERT GATE, PDSO14
Categorysemiconductor    logic   
File Size130KB,9 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

74AC14 Overview

AC SERIES, HEX 1-INPUT INVERT GATE, PDSO14

74AC14 Parametric

Parameter NameAttribute value
Number of functions6
Number of terminals14
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage6 V
Minimum supply/operating voltage2 V
Rated supply voltage3.3 V
Processing package description4.40 MM, Lead FREE, MO-153AB, TSSOP-14
Lead-freeYes
EU RoHS regulationsYes
stateDISCONTINUED
CraftsmanshipCMOS
packaging shapeRectangle
Package SizeSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
surface mountYes
Terminal formGULL WING
Terminal spacing0.6500 mm
terminal coatingMATTE Tin
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelINDUSTRIAL
seriescomminicate
Logic IC typeNo
Number of inputs1
propagation delay TPD15 ns
74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input
November 1988
Revised September 2005
74AC14 • 74ACT14
Hex Inverter with Schmitt Trigger Input
General Description
The 74AC14 and 74ACT14 contain six inverter gates each with
a Schmitt trigger input. They are capable of transforming slowly
changing input signals into sharply defined, jitter-free output sig-
nals. In addition, they have a greater noise margin than conven-
tional inverters.
The 74AC14 and 74ACT14 have hysteresis between the posi-
tive-going and negative-going input thresholds (typically 1.0V)
which is determined internally by transistor ratios and is essen-
tially insensitive to temperature and supply voltage variations.
Features
O
I
CC
reduced by 50%
O
Outputs source/sink 24 mA
O
74ACT14 has TTL-compatible inputs
Ordering Code:
Order Number
74AC14SC
74AC14SCX_NL
(Note 1)
74AC14SJ
74AC14MTC
74AC14MTCX_NL
(Note 1)
74AC14PC
74ACT14SC
74ACT14MTC
74ACT14MTCX_NL
(Note 1)
74ACT14PC
Package
Number
M14A
M14A
M14D
MTC14
MTC14
N14A
M14A
MTC14
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009917
www.fairchildsemi.com
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